AD7237A/AD7247A–SPECIFICATIONS
R = 2 kΩ, C = 100 pF. All specifications T to T unless otherwise noted.)
L
L
MIN
MAX
(V
DD
= +12 V to +15 V,
1
V
SS
= 0 V or –12 V to –15 V,
1
AGND =
DGND = 0 V [AD7237A], GND = 0 V [AD7247A], REF IN = +5 V,
Test Conditions/Comments
Parameter
STATIC PERFORMANCE
Resolution
Relative Accuracy
3
Differential Nonlinearity
3
Unipolar Offset Error
3
Bipolar Zero Error
3
Full-Scale Error
3, 5
Full-Scale Mismatch
5
REFERENCE OUTPUT
REF OUT
Reference Temperature
Coefficient
Reference Load Change
(∆REF OUT vs.
∆I)
REFERENCE INPUT
Reference Input Range
Input Current
6
DIGITAL INPUTS
Input High Voltage, V
INH
Input Low Voltage, V
INL
Input Current
I
IN
(Data Inputs)
Input Capacitance
6
ANALOG OUTPUTS
Output Range Resistors
Output Voltage Ranges
7
Output Voltage Ranges
7
DC Output Impedance
A
2
12
±
1
±
0.9
±
3
±
6
±
5
±
1
4.97/5.03
±
25
–1
4.75/5.25
±
5
2.4
0.8
±
10
8
15/30
+5, +10
+5, +10,
±
5
0.5
B
2
12
±
1/2
±
0.9
±
3
±
4
±
5
±
1
4.97/5.03
±
25
–1
4.75/5.25
±
5
2.4
0.8
±
10
8
T
2
12
±
1/2
±
0.9
±
4
±
6
±
6
±
1
4.95/5.05
±
25
–1
4.75/5.25
±
5
2.4
0.8
±
10
8
Units
Bits
LSB max
LSB max
LSB max
LSB max
LSB max
LSB typ
V min/max
ppm/°C typ
mV max
V min/max
µA
max
V min
V max
µA
max
pF max
Guaranteed Monotonic
V
SS
= 0 V or –12 V to –15 V
4
. DAC Latch Contents All 0s
V
SS
= –12 V to –15 V
4
. DAC Latch Contents
1000 0000 0000
Reference Load Current Change (0-100
µA)
5 V
±
5%
V
IN
= 0 V to V
DD
15/30
15/30
+5, +10
+5, +10,
±
5 +5, +10,
±
5
0.5
0.5
kΩ min/max
V
Single Supply; (V
SS
= 0 V)
Dual Supply; (V
SS
= –12 V to –15 V
4
)
Ω
typ
Settling Time to Within
±
1/2 LSB of Final Value
DAC Latch all 0s to all 1s. Typically 5
µs
DAC Latch all 1s to all 0s. Typically 5
µs
V
SS
= –12 V to –15 V
4
.
AC CHARACTERISTICS
6
Voltage Output Settling Time
Positive Full-Scale Change 8
Negative Full-Scale Change 8
Digital-to-Analog Glitch
Impulse
3
Digital Feedthrough
3
Digital Crosstalk
3
POWER REQUIREMENTS
V
DD
V
SS
I
DD
I
SS
(Dual Supplies)
30
10
30
+10.8/+16.5
–10.8/–16.5
15
5
8
8
30
10
30
10
10
30
10
30
µs
max
µs
max
nV secs typ DAC Latch Contents Toggled Between all 0s and all 1s
nV secs typ
nV secs typ
V min/max
V min/max
mA max
mA max
For Specified Performance Unless Otherwise Stated
For Specified Performance Unless Otherwise Stated
Output Unloaded. Typically 10 mA
Output Unloaded. Typically 3 mA
+11.4/+15.75 +11.4/+15.75
–11.4/–15.75 –11.4/–15.75
15
15
5
5
NOTES
1
Power Supply tolerance is
±
10% for A version and
±
5% for B and T versions.
2
Temperature ranges are as follows: A, B Versions, –40°C to +85°C; T Version, –55°C to +125°C.
3
See Terminology.
4
With appropriate power supply tolerances.
5
Measured with respect to REF IN and includes unipolar/bipolar offset error.
6
Sample tested @ +25°C to ensure compliance.
7
0 V to +10 V range is only available with V
DD
≥
14.25 V.
Specifications subject to change without notice.
–2–
REV. 0
AD [ ANALOG DEVICES ]
