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AD7237AAR 参数 Datasheet PDF下载

AD7237AAR图片预览
型号: AD7237AAR
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS双12位DACPORTs [LC2MOS Dual 12-Bit DACPORTs]
分类和应用: 转换器光电二极管信息通信管理
文件页数/大小: 12 页 / 394 K
品牌: AD [ ANALOG DEVICES ]
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AD7237A/AD7247A
AD7237A PIN FUNCTION DESCRIPTION (DIP PIN NUMBERS)
Pin
1
Mnemonic
REF INA
Description
Voltage Reference Input for DAC A. The reference voltage for DAC A is applied to this pin. It is internally
buffered before being applied to the DAC. The nominal reference voltage for correct operation of the
AD7237A is 5 V.
Voltage Reference Output. The internal 5 V analog reference is provided at this pin. To operate the part with
internal reference, REF OUT should be connected to REF INA, REF INB.
Voltage Reference Input for DAC B. The reference voltage for DAC B is applied to this pin. It is internally
buffered before being applied to the DAC. The nominal reference voltage for correct operation of the
AD7237A is 5 V.
Output Offset Resistor for DAC B. This input configures the output ranges for DAC B. It is connected to
V
OUTB
for the +5 V range, to AGND for the +10 V range and to REF INB for the
±
5 V range.
Analog Output Voltage from DAC B. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and
±
5 V. The amplifier is capable of developing
+10 V across a 2 kΩ resistor to GND.
Analog Ground. Ground reference for DACs, reference and output buffer amplifiers.
Data Bit 7.
Data Bit 6 to Data Bit 4.
Data Bit 3/Data Bit 11 (MSB).
Digital Ground. Ground reference for digital circuitry.
Data Bit 2/Data Bit 10.
Data Bit 1/Data Bit 9.
Data Bit 0 (LSB)/Data Bit 8.
Address Input. Least significant address input for input latches. A0 and A1 select which of the four input
latches data is written to (see Table II).
Address Input. Most significant address input for input latches.
Chip Select. Active low logic input. The device is selected when this input is active.
Write Input.
WR
is an active low logic input which is used in conjunction with
CS,
A0 and A1 to write data
to the input latches.
Load DAC. Logic input. A new word is loaded into the DAC latches from the respective input latches on the
falling edge of this signal.
Positive Supply (+12 V to +15 V).
Analog Output Voltage from DAC A. This is the buffer amplifier output voltage. Three different output
voltage ranges can be chosen: 0 V to +5 V, 0 V to +10 V and
±
5 V. The amplifier is capable of developing
+10 V across a 2 kΩ resistor to GND.
Negative Supply (0 V or –12 V to –15 V).
Output Offset Resistor for DAC A. This input configures the output ranges for DAC A. It is connected to
V
OUTA
for the +5 V range, to AGND for the +10 V range and to REF INA for the
±
5 V range.
2
3
REF OUT
REF INB
4
5
R
OFSB
V
OUTB
6
7
8-10
11
12
13
14
15
16
17
18
19
20
21
22
AGND
DB7
DB6-DB4
DB3
DGND
DB2
DB1
DB0
A0
A1
CS
WR
LDAC
V
DD
V
OUTA
23
24
V
SS
R
OFSA
–4–
REV. 0