AD680
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
TP*
1
2
3
4
8
7
6
5
TP*
TP*
V
+V
IN
AD680
TEMP
TOP VIEW
OUT
(Not to Scale)
GND
NC
NC = NO CONNECT
*TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
Figure 3. 8-Lead PDIP and 8-Lead SOIC Pin Configuration
AD680
BOTTOM VIEW
(Not to Scale)
3
2
1
+V
V
GND
IN
OUT
Figure 4. Connection Diagram
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Descriptions
1, 7, 8
TP
Test Point. A factory test point. No connections are made to these pins.
2
3
4
5
6
+VIN
Input Voltage.
Temperature Output.
Ground.
No Connect.
Output Voltage.
TEMP
GND
NC
VOUT
Rev. H | Page 5 of 12
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