AD6620
The impulse response length of the CIC2 is given by
0.20
0.00
2 × MCIC2 − 1
(
)
fADC
The composite impulse response length of all three stages is
–0.20
–0.40
–0.60
–0.80
58.9824MHz
SAMPLE RATE
NTAPS × MCIC5 × MCIC2 + 4 × MCIC5 × MCIC2 − 3 × MCIC2 + 1
M
M
M
N
= 2
= 4
= 6
CIC2
CIC5
RCF
fADC
= 48
The Algorithmic Latency is
TAPS
AT 8 OUTPUT SAMPLES,
THE LATENCY WOULD
BE 6.51s
NTAPS × MCIC5 × MCIC2 + 4 × MCIC5 × MCIC2 − 3 × MCIC2 + 1
2 × fADC
EXPECTED LATENCY = 6.31s
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
OUTPUT SAMPLES
Fixed Latency is the delay due to each register between the input
and the output of the AD6620. The latency is the count of each
register multiplied by the period of the clock that drives it. The
fixed latency of the AD6620 can be approximated by the follow-
ing expression:
Figure 53. CDMA Example
0.20
0.00
10tCLK + tSAMP 7 + MCIC2 7 + MCIC5 5 + MRCF + NTAPS × tCLK
[
]
[
]
[
]
where:
tCLK is the high speed clock to the AD6620.
–0.20
–0.40
–0.60
–0.80
tSAMP is the data rate delivered to the AD6620.
64.512MHz
SAMPLE RATE
Normally tCLK and tSAMP are the same unless a clock multiplier is
used such as with the AD6600’s 2× clock output.
M
M
M
N
= 2
= 14
= 3
CIC2
CIC5
RCF
= 84
Variable Latency is due to any differences between the asyn-
chronous edge of the SYNC pulses and the data rate. This
includes use of the internal synchronization options.
TAPS
AT 19 OUTPUT SAMPLES,
THE LATENCY WOULD
BE 24.7s
EXPECTED LATENCY = 24.31s
Based on the information on latency, the plots shown below
provide typical latency for a variety of different applications.
They were obtained by inserting a –FS dc step into the Input Data
Port of the AD6620. These are I channel step responses for the
input transient. The latency is defined as the output period times
number of output samples until the output reached approxi-
mately 50% of the step value.
1
3
5
7
9
11 13 15 17 19 21 23 25 27 29
OUTPUT SAMPLES
Figure 54. PHS Example
0.20
0.00
0.20
–0.20
–0.40
–0.60
–0.80
–1.00
0.00
65.0MHz
–0.20
SAMPLE RATE
M
M
M
N
= 2
= 6
= 20
= 240
CIC2
CIC5
RCF
61.44MHz
–0.40
SAMPLE RATE
M
M
M
= 16
= 8
= 8
TAPS
CIC2
CIC5
RCF
AT 9 OUTPUT SAMPLES,
THE LATENCY WOULD
BE 33.23s
–0.60
–0.80
–1.00
N
= 256
TAPS
EXPECTED LATENCY = 31.2s
AT 19 OUTPUT SAMPLES,
THE LATENCY WOULD
BE 0.32ms
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
OUTPUT SAMPLES
EXPECTED LATENCY = 0.303ms
Figure 55. WB-GSM Example
1
3
5
7
9
11 13 15 17 19 21 23 25 27 29
OUTPUT SAMPLES
Figure 52. AMPS Example
REV. A
–41–
ADI [ ADI ]
