AD627
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
R
1
2
3
4
8
7
6
5
R
G
G
R
1
2
3
4
8
7
6
5
R
G
G
AD627
–IN
+IN
+V
AD627
S
+V
–IN
+IN
S
TOP VIEW
TOP VIEW
OUTPUT
REF
(Not to Scale)
OUTPUT
REF
(Not to Scale)
–V
S
–V
S
Figure 3. 8-Lead PDIP Pin Configuration
Figure 4. 8-Lead SOIC_N Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Description
1
2
3
4
5
6
7
8
RG
External Gain Setting Resistor. Place gain setting resistor across RG pins to set the gain.
Negative Input.
Positive Input.
Negative Voltage Supply Pin.
Reference Pin. Drive with low impedance voltage source to level shift the output voltage.
Output Voltage.
Positive Supply Voltage.
−IN
+IN
−VS
REF
OUTPUT
+VS
RG
External Gain Setting Resistor. Place gain setting resistor across RG pins to set the gain.
Rev. D | Page 8 of 24
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