AD623
are common mode (the same on both in amp inputs) and are
not applied differentially. This second low pass network, R1+R2
and C3, has a –3 dB frequency equal to: 1/(2 π (R1+R2) (C3)).
Using a C3 value of 0.047 µF as shown, the –3 dB signal BW of
this circuit is approximately 400 Hz. The typical dc offset shift
over frequency will be less than 1.5 µV and the circuit’s RF
signal rejection will be better than 71 dB. The 3 dB signal band-
width of this circuit may be increased to 900 Hz by reducing
resistors R1 and R2 to 2.2 kΩ. The performance is similar to
that using 4 kΩ resistors, except that the circuitry preceding the
in amp must drive a lower impedance load.
In many applications shielded cables are used to minimize noise;
for best CMR over frequency the shield should be properly
driven. Figure 44 shows an active guard drive that is configured
to improve ac common-mode rejection by “bootstrapping” the
capacitances of input cable shields, thus minimizing the capaci-
tance mismatch between the inputs.
+V
S
–INPUT
R
G
2
100⍀
V
AD623
AD8031
+INPUT
OUT
R
G
The circuit of Figure 43 should be built using a PC board with a
ground plane on both sides. All component leads should be as
short as possible. Resistors R1 and R2 can be common 1% metal
film units but capacitors C1 and C2 need to be ±5% tolerance
devices to avoid degrading the circuit’s common-mode rejection.
Either the traditional 5% silver mica units or Panasonic ±2%
PPS film capacitors are recommended.
2
REFERENCE
–V
S
Figure 44. Common-Mode Shield Driver
GROUNDING
Since the AD623 output voltage is developed with respect to the
potential on the reference terminal, many grounding problems
can be solved by simply by tying the REF pin to the appropri-
ate “local ground.” The REF pin should, however, be tied to a
low impedance point for optimal CMR.
+V
S
0.33F
0.01F
R1
4.02k⍀
1%
C1
1000pF
5%
–IN
+IN
R2
4.02k⍀
1%
C3
0.047F
The use of ground planes is recommended to minimize the
impedance of ground returns (and hence the size of dc errors).
In order to isolate low level analog signals from a noisy digital
environment, many data-acquisition components have separate
analog and digital ground returns (Figure 45). All ground pins
from mixed signal components such as analog-to-digital converters
should be returned through the “high quality” analog ground
R
V
AD623
G
OUT
REFERENCE
C2
1000pF
5%
0.33F
0.01F
LOCATE C1–C3 AS CLOSE
TO THE INPUT PINS AS POSSIBLE
–V
S
Figure 43. Circuit to Attenuate RF Interference
ANALOG POWER SUPPLY
DIGITAL POWER SUPPLY
GND
+5V
–5V
+5V
GND
0.1F
0.1F 0.1F
0.1F
AGND
V
DD
V
AGND DGND
V
12
AD623
DD
IN1
PROCESSOR
ADC
AD7892-2
V
IN2
Figure 45. Optimal Grounding Practice for a Bipolar Supply Environment with Separate Analog and Digital Supplies
POWER SUPPLY
GND
+5V
0.1F
0.1F
0.1F
V
DGND
V
DGND
AGND
12
DD
DD
AD623
V
IN
PROCESSOR
ADC
AD7892-2
Figure 46. Optimal Ground Practice in a Single Supply Environment
–13–
REV. C
ADI [ ADI ]
