AD623
Amplifying Signals with Low Common-Mode Voltage
Because the common-mode input range of the AD623 extends
0.1 V below ground, it is possible to measure small differential
signals which have low, or no, common mode component. Fig-
ure 50 shows a thermocouple application where one side of the
J-type thermocouple is grounded.
The voltages on these internal nodes are critical in determining
whether or not the output voltage will be clipped. The voltages
A1 and VA2 can swing from about 10 mV above the negative
supply (V– or Ground) to within about 100 mV of the positive
rail before clipping occurs. Based on this and from the above
equations, the maximum and minimum input common-mode
voltages are given by the equations
V
+5V
VCMMAX = V+ – 0.7 V – VDIFF × Gain/2
0.1F
VCMMIN = V– – 0.590 V + VDIFF × Gain/2
These equations can be rearranged to give the maximum possible
differential voltage (positive or negative) for a particular common-
mode voltage, gain, and power supply. Because the signals on A1
and A2, can clip on either rail, the maximum differential voltage
will be the lesser of the two equations.
R
J-TYPE
THERMOCOUPLE
G
AD623
V
OUT
1.02k⍀
REF
2V
|VDIFFMAX| = 2 (V+ – 0.7 V – VCM)/Gain
|VDIFFMAX| = 2 (VCM – V– +0.590 V)/Gain
Figure 50. Amplifying Bipolar Signals with Low Common-
Mode Voltage
However, the range on the differential input voltage range is also
constrained by the output swing. So the range of VDIFF may have
to be lower according the equation.
Over a temperature range from –200°C to +200°C, the J-type
thermocouple delivers a voltage ranging from –7.890 mV to
10.777 mV. A programmed gain on the AD623 of 100 (RG =
1.02 kΩ) and a voltage on the AD623 REF pin of 2 V, results in
the AD623’s output voltage ranging from 1.110 V to 3.077 V
relative to ground.
Input Range ≤ Available Output Swing/Gain
For a bipolar input voltage with a common-mode voltage that is
roughly half way between the rails, VDIFFMAX will be half the
value that the above equations yield because the REF pin will be
at midsupply. Note that the available output swing is given for
different supply conditions in the Specifications section.
INPUT DIFFERENTIAL AND COMMON-MODE RANGE
VS. SUPPLY AND GAIN
Figure 51 shows a simplified block diagram of the AD623. The
voltages at the outputs of the amplifiers A1 and A2 are given by
the equations
The equations can be rearranged to give the maximum gain for a
fixed set of input conditions. Again, the maximum gain will be
the lesser of the two equations.
VA2 = VCM + VDIFF/2 + 0.6 V + VDIFF × RF/RG
= VCM + 0.6 V + VDIFF × Gain/2
GainMAX = 2 (V+ – 0.7 V – VCM)/VDIFF
GainMAX = 2 (VCM – V– +0.590 V)/VDIFF
VA1 = VCM – VDIFF/2 + 0.6 V – VDIFF × RF/RG
= VCM + 0.6 V – VDIFF × Gain/2
Again, we must ensure that the resulting gain times the input
range is less than the available output swing. If this is not the
case, the maximum gain is given by,
POS SUPPLY
7
GainMAX = Available Output Swing/Input Range
Also for bipolar inputs (i.e., input range = 2 VDIFF), the maxi-
mum gain will be half the value yielded by the above equations
because the REF pin must be at midsupply.
INVERTING
A1
2
R
F
50k⍀
4
50k⍀
The maximum gain and resulting output swing for different
input conditions is given in Table IV. Output voltages are refer-
enced to the voltage on the REF pin.
50k⍀
50k⍀
V
1
DIFF
2
V
OUT
6
R
A3
50k⍀
GAIN
G
V
CM
R
F
For the purposes of computation, it is necessary to break down
the input voltage into its differential and common-mode compo-
nent. So when one of the inputs is grounded or at a fixed voltage,
the common-mode voltage changes as the differential voltage
changes. Take the case of the thermocouple amplifier in Figure
50. The inverting input on the AD623 is grounded. So when the
input voltage is –10 mV, the voltage on the noninverting input is
–10 mV. For the purposes of signal swing calculations, this input
voltage should be considered to be composed of a common-mode
voltage of –5 mV (i.e., (+IN + –IN)/2) and a differential input
voltage of –10 mV (i.e., +IN – –IN).
REF
5
50k⍀
8
7
V
DIFF
2
A2
3
NONINVERTING
4
NEG SUPPLY
Figure 51. Simplified Block Diagram
REV. C
–15–
ADI [ ADI ]
