AD600/AD602
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
C1LO
A1HI
A1LO
GAT1
GAT2
A2LO
A2HI
C2LO
1
2
3
4
REF
5
–
6
7
8
A2
10 A2CM
+
–
A1
16 C1HI
15 A1CM
14 A1OP
13 VPOS
12 VNEG
11 A2OP
AD600 /
AD602
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
C1LO
A1HI
A1LO
GAT1
GAT2
A2LO
A2HI
C2LO
C2HI
A2CM
A2OP
VNEG
VPOS
A1OP
A1CM
C1HI
Description
CH1 Gain-Control Input LO (Positive Voltage Reduces CH1 Gain)
CH1 Signal Input HI (Positive Voltage Increases CH1 Output)
CH1 Signal Input LO (Usually Connected to CH1 Input Ground)
CH1 Gating Input (A Logic HI Shuts Off CH1 Signal Path)
CH2 Gating Input (A Logic HI Shuts Off CH2 Signal Path)
CH2 Signal Input LO (Usually Connected to CH2 Input Ground)
CH2 Signal Input HI (Positive Voltage Increases CH2 Output)
CH2 Gain-Control Input LO (Positive Voltage Reduces CH2 Gain)
CH2 Gain-Control Input HI (Positive Voltage Increases CH2 Gain)
CH2 Common (Usually Connected to CH2 Output Ground)
CH2 Output
Negative Supply for Both Amplifiers
Positive Supply for Both Amplifiers
CH1 Output
CH1 Common (Usually Connected to CH1 Output Ground)
CH1 Gain-Control Input HI (Positive Voltage Increases CH1 Gain)
Rev. E | Page 6 of 28
00538-002
+
9
C2HI
AD [ ANALOG DEVICES ]
