AD561–SPECIFICATIONS
(T = +25 C, V
A
CC
= –15 V, unless otherwise noted.)
Max
±
1/2
(0.05)
Min
AD561K
Typ
10 Bits
±
1/8
(0.012)
±
1/4
±
1/4
(0.025)
±
1/2
LSB
% of FS
LSB
Max
Units
Model
RESOLUTION
ACCURACY (Error Relative
to Full Scale)
DIFFERENTIAL NONLINEARITY
DATA INPUTS
TTL, V
CC
= +5 V
Bit ON Logic “1”
Bit OFF Logic “0”
CMOS, 10 V
≤
V
CC
≤
16.5 V
Bit ON Logic “ 1 “
Bit OFF Logic “0”
Logic Current (Each Bit) (T
MIN
to T
MAX
)
Bit ON Logic “1”
Bit OFF Logic “0”
OUTPUT
Current
Unipolar
Bipolar
Resistance (Exclusive of
Application Resistors)
Unipolar Zero (All Bits OFF)
Capacitance
Compliance Voltage
SETTLING TIME TO 1/2 LSB
All Bits ON-to-OFF or OFF-to-ON
POWER REQUIREMENTS
V
CC
, +4.5 V dc to +16.5 V dc
V
EE
, –10.8 V dc to –16.5 V dc
POWER SUPPLY GAIN SENSITIVITY
V
CC
, +4.5 V dc to +16.5 V dc
V
EE
, –10.8 V dc to –16.5 V dc
TEMPERATURE RANGE
Operating
Storage (“D” Package)
(“N” Package)
TEMPERATURE COEFFICIENTS
With Internal Reference
Unipolar Zero
Bipolar Zero
Full Scale
Differential Nonlinearity
MONOTONICITY
PROGRAMMABLE OUTPUT
RANGES
CALIBRATION ACCURACY
Full-Scale Error with Fixed 25
Ω
`
Resistor
Bipolar Zero Error with Fixed 10
Ω
Resistor
CALIBRATION ADJUSTMENT
RANGE
Full Scale (With 50
Ω
Trimmer)
Bipolar Zero (With 50
Ω
Trimmer)
NOTES
*Specifications same as AD561J specifications.
Specifications subject to change without notice.
Min
AD561J
Typ
10 Bits
±
1/4
(0.025)
±
1/2
+2.0
+0.8
70% V
CC
30% V
CC
+5
–5
+100
–25
*
*
*
*
*
*
*
*
V
V
V
V
nA
µA
1.5
±
0.75
2.0
±
1.0
40 M
0.01
25
–3
250
8
12
2
4
2.4
±
1.2
*
*
*
*
*
*
*
*
*
*
*
mA
mA
Ω
% of FS
pF
V
ns
0.05
+10
*
*
*
–2
10
16
10
25
*
*
*
*
*
*
*
*
*
*
*
*
*
*
mA
mA
ppm of FS/%
ppm of FS/%
°C
°C
°C
0 to +70
–65 to +150
–25 to +85
1
2
15
2.5
10
20
80
1
2
15
2.5
5
10
30
ppm of FS/°C
ppm of FS/°C
ppm of FS/°C
ppm of FS/°C
Guaranteed Over Full Operating
Temperature Range
0 to +10
–5 to +5
Guaranteed Over Full Operating
Temperature Range
*
*
V
V
±
0.1
±
0.1
*
*
% of FS
% of FS
±
0.5
±
0.5
*
*
% of FS
% of FS
–2–
REV. A
AD [ ANALOG DEVICES ]
