AD976/AD976A
All Grades
Typ
Parameter
Conditions
Min
Max
Units
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
Parallel 16 Bits
Binary Twos Complement
+0.4
ISINK = 1.6 mA
ISOURCE = 500 µA
High-Z State,
V
V
µA
VOH
+4
Leakage Current
±5
V
OUT = 0 V to VDIG
Output Capacitance
High-Z State
15
pF
DIGITAL TIMING
Bus Access Time
Bus Relinquish Time
83
83
ns
ns
POWER SUPPLIES
Specified Performance
VDIG
VANA
4.75
4.75
5
5
5.25
5.25
V
V
IDIG
IANA
3.0
11
mA
mA
mW
Power Dissipation
100
+85
TEMPERATURE RANGE
Specified Performance
–40
°C
Specifications subject to change without notice.
(AD976A: F = 200 kHz; AD976: F = 100 kHz; –40؇C to +85؇C, VDIG = VANA = +5 V unless otherwise noted)
TIMING SPECIFICATIONS
S
S
Symbol
Min
Typ
Max
Units
Convert Pulsewidth
Data Valid Delay after R/C Low (AD976A/AD976)
BUSY Delay from R/C Low
BUSY Low (AD976A/AD976)
BUSY Delay after End of Conversion (AD976A/AD976)
Aperture Delay
Conversion Time (AD976A/AD976)
Acquisition Time
Bus Relinquish Time
BUSY Delay after Data Valid (AD976A/AD976)
Previous Data Valid after R/C Low (AD976A/AD976)
Throughput Time (AD976A/AD976)
R/C to CS Setup Time
Time Between Conversions (AD976A/AD976)
Bus Access and Byte Delay
t1
t2
t3
t4
t5
t6
t7
t8
50
ns
µs
ns
µs
ns
ns
µs
µs
ns
ns
µs
µs
ns
µs
ns
4.0/8.0
83
4.0/8.0
180/360
40
3.8/7.6
4.0/8.0
83
1.0/2.0
10
50
t9
35
180/360
3.7/7.4
t10
t11
t7 + t8
t12
t13
t14
5/10
83
10
5/10
10
Specifications subject to change without notice.
REV. C
–4–