AD9020
EXPLANATION OF TEST LEVELS
Test Level
ORDERING GUIDE
Temperature
Package
Option*
I
– 100% production tested.
Device
Range
Description
II – 100% production tested at 25°C, and sample tested at
AD9020JZ
AD9020JE
AD9020KZ
AD9020KE
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
68-Lead Leaded Ceramic Z-68
68-Terminal Ceramic LCC E-68A
68-Lead Leaded Ceramic Z-68
68-Terminal Ceramic LCC E-68A
specified temperatures.
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization
testing.
AD9020SZ/883 –55°C to +125°C 68-Lead Leaded Ceramic Z-68
AD9020SE/883 –55°C to +125°C 68-Terminal Ceramic LCC E-68A
AD9020TZ/883 –55°C to +125°C 68-Lead Leaded Ceramic Z-68
AD9020TE/883 –55°C to +125°C 68-Terminal Ceramic LCC E-68A
V
– Parameter is a typical value only.
AD9020/PCB
0°C to 70°C
Evaluation Board
VI – All devices are 100% production tested at 25°C. 100%
production tested at temperature extremes for extended
temperature devices; sample tested at temperature extremes
for commercial/industrial devices.
*E = Ceramic Leadless Chip Carrier; Z = Ceramic Leaded Chip Carrier.
5.0V
0.1F
DIE LAYOUT AND MECHANICAL INFORMATION
3,6,15,18,25,30,33,34,
37,40,45,52,55,65,68
Die Dimensions . . . . . . . . . . . . . . . 206 ϫ 140 ϫ 15 ( 2) mils
Pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 ϫ 4 mils
Metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gold
Backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS
Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Nitride
510⍀
100⍀
510⍀
8
9
19
23
+V
S
AD1
AD2
ANALOG IN
D
– D
4
0
46
51
14 ENCODE
+V
D
– D
9
5
AD9020
+2V
12
REF
REF
510⍀
–2V
56 –V
4,5,13,17,
27,31,32,
59
61
LSBs INVERT
MSB INVERT
GROUND
36,38,39,
–V
S
43,53,66,67
2,16,28,29,35,
41,42,54,64
+V
+V
S
S
0.1F
D
D
D
D
D
D
D
D
5
6
7
8
9
4
–5.2V
3
2
STATIC: AD1 = –2V; AD2 = +2.4V
DYNAMIC: AD1 = ؎2V TRIANGLE WAVE
D
1
AD2 = TTL PULSE TRAIN
(MSB)
D
(LSB)
0
OVERFLOW
+V
+V
S
Figure 1. Burn-In Circuit
GROUND
S
–V
GROUND
S
+V
–V
S
S
+V
ENCODE
GROUND
S
–V
REF
–V
+V
SENSE
REF
+V
LSBs INVERT
SENSE
REV. C
–4–
ADI [ ADI ]
