AD7870/AD7875/AD7876
DIP and SOIC PLCC
Pin No.
Pin No.
Mnemonic
AGND
REF OUT
Function
18
19
21
23
Analog Ground. Ground reference for track-and-hold, reference and DAC.
Voltage Reference Output. The internal 3 V reference is provided at this pin. The external load capability is
500 μA.
20
2/
VIN
Analog Input. The analog input range is 3 V for the AD7870, 10 V for the AD7876, and 0 V to +5 V for the
AD7875.
21
22
25
26
VSS
Negative Supply, −5 V 5ꢁ.
8
Three Function Input. Defines the data format and serial clock format. With this pin at +5 V, the output
data for-mat is 12-bit parallel only. With this pin at 0 V, either byte or serial data is available and SCLK is
not continuous. With this pin at −5 V, either byte or serial data is again available but SCLK is now
continuous.
12ꢀ ꢀCLK
23
2/
27
28
CONVST
CS
Convert Start. A low to high transition on this input puts the track-and-hold into its hold mode and
starts conversion. This input is asynchronous to the CLK input.
CONVST
Chip Select. Active low logic input. The device is selected when this input is active. With
CS
tied
low, a new conversion is initiated when goes low.
Table 6. Output Data for Byte Interfacing
HBEN
High
Low
DB7/Low
DB6/Low
DB5/Low
Low
DB5
DB4/Low
Low
DB/
DB3/DB11
DB11(MSB)
DB3
DB2/DB10
DB10
DB2
DB1/DB9
DB9
DB1
DB0/DB8
DB8
DB0 (LSB)
Low
DB7
Low
DB6
Rev. C | Page 9 of 28
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