AD598
a voltage proportional to position. This technique uses the pri-
mary excitation voltage as a phase reference to determine the
polarity of the output voltage. There are a number of problems
associated with this technique such as (1) producing a constant
amplitude, constant frequency excitation signal, (2) compensating
for LVDT primary to secondary phase shifts, and (3) compen-
sating for these shifts as a function of temperature and frequency.
As shown in Figure 6, the input to the integrator is [(A+B)d]B.
Since the integrator input is forced to 0, the duty cycle d =
B/(A+B).
The output comparator which produces d = B/(A+B) also con-
trols an output amplifier driven by a reference current. Duty
cycle signals d and (1–d) perform separate modulations on the
reference current as shown in Figure 6, which are summed. The
summed current, which is the output current, is IREF × (1–2d).
The AD598 eliminates all of these problems. The AD598 does
not require a constant amplitude because it works on the ratio of
the difference and sum of the LVDT output signals. A constant
frequency signal is not necessary because the inputs are rectified
and only the sine wave carrier magnitude is processed. There is
no sensitivity to phase shift between the primary excitation and
the LVDT outputs because synchronous detection is not em-
ployed. The ratiometric principle upon which the AD598 oper-
ates requires that the sum of the LVDT secondary voltages
remains constant with LVDT stroke length. Although LVDT
manufacturers generally do not specify the relationship between
VA+VB and stroke length, it is recognized that some LVDTs do
not meet this requirement. In these cases a nonlinearity will
result. However, the majority of available LVDTs do in fact
meet these requirements.
Since d = B/(A+B), by substitution the output current equals
I
REF × (A–B)/(A+B). This output current is then filtered and
converted to a voltage since it is forced to flow through the scal-
ing resistor R2 such that:
VOUT = IREF ×( A – B)/(A + B)× R2
CONNECTING THE AD598
The AD598 can easily be connected for dual or single supply
operation as shown in Figures 7 and 12. The following general
design procedures demonstrate how external component values
are selected and can be used for any LVDT which meets AD598
input/output criteria.
Parameters which are set with external passive components in-
clude: excitation frequency and amplitude, AD598 system
bandwidth, and the scale factor (V/inch). Additionally, there are
optional features, offset null adjustment, filtering, and signal in-
tegration which can be used by adding external components.
The AD598 utilizes a special decoder circuit. Referring to the
block diagram and Figure 6 below, an implicit analog comput-
ing loop is employed. After rectification, the A and B signals are
multiplied by complementary duty cycle signals, d and (I–d)
respectively. The difference of these processed signals is inte-
grated and sampled by a comparator. It is the output of this
comparator that defines the original duty cycle, d, which is fed
back to the multipliers.
V TO I
INPUT
A
FILT
BINARY SIGNAL
d
d - DUTY CYCLE
0<d<1
COMP
±1
∑
INTEG
COMP
V TO I
(A+B) d–B
INPUT
B
FILT
1–d
1–d
B
● A+B
d
COMP
±1
VOLTS
OUTPUT
A–B
IREF
● A+B
IREF
BANDGAP
REFERENCE
∑
∑
FILT
INTEG
d
V TO I
RTO
OFFSET
A–B
A+B
VOUT
= RSCALE x I REF
x
Figure 6. Block Diagram of Decoder
–5–
REV. A
ADI [ ADI ]
