AD588
Data Sheet
39kΩ
Figure 5 shows gain and balance trims in a +5 V and −5 V
tracking configuration. A 100 kΩ, 20-turn potentiometer
is used for each trim. The potentiometer for gain trim is
connected between Pin 6 (VHIGH) and Pin 8 (VLOW) with the
wiper connected to Pin 5 (GAIN ADJ). The potentiometer is
adjusted to produce exactly 10 V between Pin 1 and Pin 15, the
amplifier outputs. The balance potentiometer, also connected
between Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is
then adjusted to center the span from +5 V to −5 V.
+15V
NOISE
REDUCTION
1µF
A3
A4
+5V
R
B
A1
R1
AD588
R4
R5
–5V
R2
Trimming in other configurations works in exactly the same
manner. When producing +10 V and +5 V, GAIN ADJ is used
to trim +10 V and BAL ADJ is used to trim +5 V. In the −10 V
and −5 V configuration, GAIN ADJ is again used to trim the
magnitude of the span, −10 V, while BAL ADJ is used to trim
the center tap, −5 V.
+V
+15V
S
R6
0.1µF
R3
SYSTEM
GROUND
A2
–V
S
0.1µF
–15V
SYSTEM
GROUND
100kΩ
Trimming the AD588 introduces no additional errors over
temperature, so precision potentiometers are not required. For
single-output voltage ranges, or in cases when balance adjust is
not required, Pin 12 should be connected to Pin 11. If gain
adjust is not required, Pin 5 should be left floating.
20T
BALANCE
ADJUST
100kΩ
20T
GAIN ADJUST
Figure 5. +5 V and −5 V Outputs
In single output configurations, GAIN ADJ is used to trim
outputs utilizing the full span (+10 V or −10 V), while BAL ADJ
is used to trim outputs using half the span (+5 V or −5 V).
0.1µF
0.1µF
Input impedance on both the GAIN ADJ and BAL ADJ pins is
approximately 150 kΩ. The GAIN ADJ trim network effectively
attenuates the 10 V across the trim potentiometer by a factor of
about 1500 to provide a trim range of −3.5 mV to +7.5 mV with
a resolution of approximately 550 μV/turn (20-turn potentiome-
ter). The BAL ADJ trim network attenuates the trim voltage by
a factor of about 1400, providing a trim range of 4.5 mV with
resolution of 450 ꢀV/turn.
NOISE
REDUCTION
7
6
4
3
A3
A4
1
–5V
R
B
A1
R1
AD588
14
R4
R5
–10V
+15V
15
2
R2
7
6
4
3
+V
–V
S
R6
0.1µF
R3
SYSTEM
GROUND
A3
A4
+10V
1
A2
R
B
16
S
0.1µF
A1
R1
–15V
5
9
10
8
12
11 13
14
R4
R5
SYSTEM
GROUND
15
2
+5V
R2
+V
+15V
S
Figure 6. −10 V Output
R6
0.1µF
0.1µF
R3
AD588
SYSTEM
GROUND
A2
–V
S
16
5
9
10
8
12
11
13
–15V
SYSTEM
GROUND
Figure 4. +10 V Output
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