OP490
R5
5k⍀
R2
R6
+15V
4
9k⍀
5k⍀
1/4
R1
OP490E
1k⍀
2
3
9
R3
R7
B
50⍀
50⍀
1
8
V
IN
10
11
1/4
OP490E
C
1/4
–15V
OP490E
6
5
13
R4
R8
B
50⍀
R
L
50⍀
7
14
12
1/4
OP490E
D
Figure 7. High Output Amplifier
High Output Amplifier
where n equals the decimal equivalent of the 8-bit digital code
present at the DAC. If the digital code present at the DAC
consists of all zeros, the feedback loop will be open causing the
op amp output to saturate. The 10 MW resistors placed in paral-
lel with the DAC feedback loop eliminates this problem with a
very small reduction in gain accuracy. The 2.5 V reference biases
the amplifiers to the center of the linear region providing maximum
output swing.
The amplifier shown in Figure 7 is capable of driving 25 V p-p
into a 1 kW load. Design of the amplifier is based on a bridge
configuration. A amplifies the input signal and drives the load
with the help of B. Amplifier C is a unity-gain inverter which
drives the load with help from D. Gain of the high output amplifier
with the component values shown is 10, but can easily be changed
by varying R1 or R2.
Single-Supply Micropower Quad Programmable Gain Amplifier
The combination of quad OP490 and the DAC8408 quad 8-bit
CMOS DAC, creates a quad programmable-gain amplifier with
a quiescent supply drain of only 140 mA. The digital code present
at the DAC, which is easily set by a microprocessor, determines
the ratio between the fixed DAC feedback resistor and the resis-
tance of the DAC ladder presents to the op amp feedback loop.
Gain of each amplifier is:
VOUT
VIN
256
n
= -
–12–
REV. C
ADI [ ADI ]
