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5962-89657023A 参数 Datasheet PDF下载

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型号: 5962-89657023A
PDF下载: 下载PDF文件 查看货源
内容描述: [Dual 12-Bit CMOS DAC with Parallel Load Input Structure]
分类和应用: 转换器
文件页数/大小: 12 页 / 101 K
品牌: ADI [ ADI ]
 浏览型号5962-89657023A的Datasheet PDF文件第1页浏览型号5962-89657023A的Datasheet PDF文件第2页浏览型号5962-89657023A的Datasheet PDF文件第3页浏览型号5962-89657023A的Datasheet PDF文件第4页浏览型号5962-89657023A的Datasheet PDF文件第6页浏览型号5962-89657023A的Datasheet PDF文件第7页浏览型号5962-89657023A的Datasheet PDF文件第8页浏览型号5962-89657023A的Datasheet PDF文件第9页  
TABLE I. Electrical performance characteristics – continued.  
Conditions 1/  
-55°C TA +125°C  
unless otherwise specified  
Test  
Symbol  
Group A  
subgroups  
Device  
type  
Limits  
Unit  
Min  
9.0  
Max  
20  
RIN  
VDD = 10.8 V  
VDD = 10.8 V  
Reference input  
resistance  
Reference input  
resistance match  
1, 2, 3  
All  
kΩ  
RMIN  
1, 2, 3  
1
01, 02  
03  
%
±3.0  
±3.0  
±1.0  
(VREFA/VREFB  
)
2, 3  
1, 2, 3  
1, 2, 3  
1
VIH  
VIL  
IIN  
VDD = 10.8 V and 16.5 V  
VDD = 10.8 V and 16.5 V  
VIN = VDD = 16.5 V  
Digital input high voltage  
Digital input low voltage  
Input current  
All  
All  
All  
2.4  
V
V
0.8  
1.0  
10  
µA  
2, 3  
4
CIN  
Digital input capacitance  
2/  
Output capacitance 2/  
All  
All  
10  
pF  
pF  
TA = +25°C  
COUTA  
DAC A = all 0’s,  
TA = +25°C  
4
70  
140  
70  
DAC A = all 1’s,  
TA = +25°C  
COUTB  
Output capacitance 2/  
DAC B = all 0’s,  
4
All  
pf  
TA = +25°C  
DAC B = all 1’s,  
140  
TA = +25°C  
Functional test  
Data setup time  
See 4.3.1c  
7
All  
All  
tDS  
See figure 3  
9
60  
80  
25  
25  
80  
ns  
ns  
ns  
10, 11 2/  
tDH  
Data hold time  
See figure 3  
See figure 3  
9
10, 11 2/  
9
All  
All  
tCWS  
Chip select or update to  
write setup time  
10, 11 2/  
9
100  
0
tCWH  
Chip select or update to  
write hold time  
See figure 3  
All  
ns  
10, 11 2/  
9
0
tWR  
IDD  
Write pulse width  
Supply current  
See figure 3  
VDD = 16.5 V  
All  
All  
80  
ns  
10, 11 2/  
1, 2, 3  
100  
2.0  
mA  
1/ VDD = 10.8 V to 16.5 V, unless otherwise specified. VREFA = VREFB = 10 V, voltage at AGND = 0 V,  
voltage at IOUTA = IOUTB = 0 V.  
2/ If not tested, shall be guaranteed to the limits specified in table I herein.  
SIZE  
STANDARD  
5962-89657  
A
MICROCIRCUIT DRAWING  
DLA LAND AND MARITIME  
REVISION LEVEL  
C
SHEET  
COLUMBUS, OHIO 43218-3990  
5
DSCC FORM 2234  
APR 97