AD7821
Figure 21. 16-Channel Telecom ADC System
SIMULTANEOUS SAMPLING ADC
S
The AD7821’s inherent track-and-hold and well defined sampling
instant makes it useful in such applications as sonar, where a num-
ber of input channels are required to be sampled simultaneously.
Figure 22 shows a circuit for such an application.
Figure 22. Simultaneous Sampling ADCs
The actual sampling instant at which VIN is measured occurs
approximately 50 ns after the falling edge of WR or RD in the
WR-RD or RD modes, respectively, due to internal logic delays.
However, the internal logic delay and, therefore, the sampling
instant can vary from device to device, but is typically within 5 ns.
This means that a maximum common input sine wave of 2.5 V
at 32 kHz, applied to any number of AD7821s in the circuit of
Figure 22, will yield a maximum difference between the converter
outputs of typically 1/4 LSB.
REV. B
–13–
ADI [ ADI ]
