Data Sheet
FEATURES
Low input offset voltage: 75 μV maximum
Low offset voltage drift, over −55°C < T
A
< +125°C
0.5 μV/°C maximum
Low supply current (per amplifier): 725 μA maximum
High open-loop gain: 5000 V/mV minimum
Low input bias current: 2 nA maximum
Low noise voltage density: 11 nV/√Hz at 1 kHz
Stable with large capacitive loads: 10 nF typical
Dual Low Offset, Low Power
Operational Amplifier
PIN CONNECTIONS
–IN A
1
+IN A
2
NC
3
V–
4
NC
5
+IN B
6
–IN B
7
NC
8
16
OUT A
15
NC
14
NC
13
V+
12
NC
11
NC
10
OUT B
00322-001
9
NC
NC = NO CONNECT
Figure 1. 16-Lead SOIC (S-Suffix)
OUT A
–IN A
+IN A
V–
1
2
3
4
OP200
A
B
8
7
6
5
V+
OUT B
00322-002
–IN B
+IN B
Figure 2. 8-Lead PDIP (P-Suffix)
8-Lead CERDIP (Z-Suffix)
GENERAL DESCRIPTION
The
is the first monolithic dual operational amplifier
to offer
type precision performance. Available in the
industry standard 8-lead pinout, the
combines precision
performance with the space and cost savings offered by a dual
amplifier.
The
features an extremely low input offset voltage of
less than 75 μV with a drift below 0.5 μV/°C, guaranteed over
the full military temperature range. Open-loop gain of the
exceeds 5,000,000 into a 10 kΩ load; input bias current is under
2 nA; CMRR is over 120 dB; and PSRR is below 1.8 μV/V. On-chip
Zener zap trimming is used to achieve the extremely low input
offset voltage of the
and eliminates the need for offset
pulling.
Power consumption of the
is low, with each amplifier
drawing less than 725 μA of supply current. The total current
drawn by the dual
is less than one-half that of a single
yet the
offers significant improvements over this
industry-standard op amp. The voltage noise density of the
11 nV/√Hz at 1 kHz, is half that of most competitive devices.
The
is an ideal choice for applications requiring multiple
precision op amps and where low power consumption is critical.
For a quad precision op amp, see the
Rev. G
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
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