OP470
100
100
90
A OUT 90
10
10
A OUT
0%
0%
5V
5V
1ms
Figure 16. Digital Panning Control Output
Figure 14. Noise Density of Low Noise Amplifier, G = 1000
Gain error due to the mismatching between the internal DAC
ladder resistors and the current-to-voltage feedback resistors is
eliminated by using feedback resistors internal to the DAC. Of
the four DACs available in the DAC-8408, only two DACs, A
and C, actually pass a signal. DACs B and D are used to pro-
vide the additional feedback resistors needed in the circuit. If
the VREFB and VREFD inputs remain unconnected, the
current-to-voltage converters using RFBB and RFBD are unaf-
fected by digital data reaching DACs B and D.
DIGITAL PANNING CONTROL
Figure 15 uses a DAC-8408, quad 8-bit DAC to pan a signal
between two channels. The complementary DAC current out-
puts two of the DAC-8408’s four DACs drive current-to-voltage
converters built from a single quad OP470. The amplifiers have
complementary outputs with the amplitudes dependent upon
the digital code applied to the DAC. Figure 16 shows the comple-
mentary outputs for a 1 kHz input signal and digital ramp applied
to the DAC data inputs. Distortion of the digital panning con-
trol is less than 0.01%.
5V
DAC-8408GP
V
R A
FB
DD
+15V
20pF
V
A
I
OUT1A
REF
SIDE A IN
DAC A
DAC B
1/4
A OUT
OP470E
I
OUT2A/2B
–15V
I
OUT1B
1/4
A OUT
OP470E
20pF
20pF
R
B
FB
R
C
FB
V
C
REF
I
DAC C
DAC D
OUT1C
SIDE B IN
1/4
B OUT
OP470E
DAC DATA BUS
PINS 9 (LSB) – 16 (MSB)
I
OUT2C/2D
1kꢅ
5V
A/B
R/W
DS1
DS2
I
OUT1D
1/4
1kꢅ
B OUT
OP470E
20pF
R
D
DAC SELECT
FB
DGND
Figure 15. Digital Panning Control Circuit
REV. B
–13–