AD7545A
Figure 5 and Table III illustrate the recommended circuit and
code relationship for bipolar operation. The D/A function itself
uses offset binary code and inverter U1 on the MSB line con-
verts twos complement input code to offset binary code. If ap-
propriate, inversion of the MSB may be done in software using
an exclusive –OR instruction and the inverter omitted. R3, R4
and R5 must be selected to match within 0.01%, and they
should be the same type of resistor (preferably wire-wound or
metal foil), so that their temperature coefficients match. Mis-
match of R3 value to R4 causes both offset and full-scale error.
Mismatch of R5 to R4 and R3 causes full-scale error.
Figure 6. 12-Bit Plus Sign Magnitude Converter
Table IV. 12-Bit Plus Sign Magnitude Code Table for Circuit
of Figure 6
Sign
Bit
Binary Numbers in
DAC Register
Analog Output
4095
4096
0
1 1 1 1 1 1 1 1 1 1 1 1
+ VIN ×
0
1
0 0 0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0 0 0
0 Volts
0 Volts
4095
4096
1
1 1 1 1 1 1 1 1 1 1 1 1
– VIN ×
Figure 5. Bipolar Operation (Twos Complement Code)
Note: Sign bit of “0” connects R3 to GND.
Table III. Twos Complement Code Table for Circuit of
Figure 5
APPLICATIONS HINTS
Output Offset: CMOS D/A converters such as Figures 4, 5
Data Input
Analog Output
and 6 exhibit a code dependent output resistance which, in turn,
can cause a code dependent error voltage at the output of the
amplifier. The maximum amplitude of this error, which adds
to the D/A converter nonlinearity, depends on VOS, where VOS
is the amplifier input offset voltage. To maintain specified accuracy
with VREF at 10 V, it is recommended that VOS be no greater than
0.25 mV, or (25 × 10–6) (VREF), over the temperature range of
operation. Suitable op amps are AD517 and AD711. The AD517
is best suited for fixed reference applications with low band-
width requirements: it has extremely low offset (150 µV max for
lowest grade) and in most applications will not require an offset
trim. The AD711 has a much wider bandwidth and higher slew
rate and is recommended for multiplying and other applications
requiring fast settling. An offset trim on the AD711 may be
necessary in some circuits.
2047
2048
0 1 1 1
1 1 1 1
1 1 1 1
+VIN
×
1
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 1
0 0 0 0
+VIN
×
2048
0 Volts
1
1 1 1 1
1 0 0 0
1 1 1 1
0 0 0 0
1 1 1 1
0 0 0 0
–VIN
–VIN
×
2048
2048
2048
×
General Ground Management: AC or transient voltages
between AGND and DGND can cause noise injection into the
analog output. The simplest method of ensuring that voltages at
AGND and DGND are equal is to tie AGND and DGND
together at the AD7545A. In more complex systems where the
AGND and DGND intertie is on the backplane, it is recom-
mended that two diodes be connected in inverse parallel between
the AD7545A AGND and DGND pins (1N914 or equivalent).
Figure 6 and Table IV show an alternative method of achieving
bipolar output. The circuit operates with sign plus magnitude
code and has the advantage that it gives 12-bit resolution in
each quadrant compared with 11-bit resolution per quadrant for
the circuit of Figure 5. The AD7592 is a fully protected CMOS
change-over switch with data latches. R4 and R5 should match
each other to 0.01% to maintain the accuracy of the D/A con-
verter. Mismatch between R4 and R5 introduces a gain error.
Refer to Reference 1 (supplemental application material) for
additional information on these circuits.
REV. C
–5–
ADI [ ADI ]
