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5962-0053001HXA 参数 Datasheet PDF下载

5962-0053001HXA图片预览
型号: 5962-0053001HXA
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道, 12位, 80 MSPS A / D转换器的模拟输入信号调理 [Dual Channel, 12-Bit, 80 MSPS A/D Converter with Analog Input Signal Conditioning]
分类和应用: 转换器
文件页数/大小: 20 页 / 1352 K
品牌: ADI [ ADI ]
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AD13280  
Test  
Level  
Mil  
Subgroup  
AD13280AZ/BZ  
Typ  
Parameter  
Temp  
Min  
Max  
Unit  
SPURIOUS-FREE DYNAMIC RANGE1, 8  
Analog Input @ 10 MHz  
25°C  
Min  
Max  
25°C  
Min  
Max  
25°C  
Min  
I
4
6
5
4
6
5
4
6
5
75  
70  
75  
68  
67  
68  
56  
55  
56  
80  
75  
62  
dBFS  
II  
II  
I
II  
II  
I
Analog Input @ 21 MHz  
Analog Input @ 37 MHz  
dBFS  
dBFS  
II  
II  
Max  
SINGLE-ENDED ANALOG INPUT  
Passband Ripple to 10 MHz  
Passband Ripple to 25 MHz  
25°C  
25°C  
V
V
0.05  
0.1  
dB  
dB  
DIFFERENTIAL ANALOG INPUT  
Passband Ripple to 10 MHz  
Passband Ripple to 25 MHz  
25°C  
25°C  
V
V
0.3  
0.82  
dB  
dB  
TWO-TONE IMD REJECTION9  
fIN = 9.1 MHz and 10.1 MHz  
f1 and f2 are –7 dB  
25°C  
Min  
Max  
25°C  
I
4
6
5
4
75  
71  
75  
80  
dBc  
II  
II  
V
f
IN = 19.1 MHz and 20.7 MHz  
77  
60  
dBc  
dBc  
f1 and f2 are –7 dB  
fIN = 36 MHz and 37 MHz  
f1 and f2 are –7 dB  
25°C  
V
4
CHANNEL-TO-CHANNEL ISOLATION10  
TRANSIENT RESPONSE  
25°C  
25°C  
IV  
V
12  
90  
dB  
ns  
25  
DIGITAL OUTPUTS11  
Logic Compatibility  
DVCC = 3.3 V  
CMOS  
Logic “1” Voltage  
Logic “0” Voltage  
DVCC = 5 V  
Full  
Full  
I
I
1, 2, 3  
1, 2, 3  
2.5  
DVCC – 0.2  
0.2  
V
V
0.5  
Logic “1” Voltage  
Logic “0” Voltage  
Output Coding  
Full  
Full  
V
V
DVCC – 0.3  
0.35  
Two’s Complement  
V
V
POWER SUPPLY  
AVCC Supply Voltage12  
I (AVCC) Current  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
Full  
IV  
I
IV  
I
IV  
I
I
4.85  
5.0  
5.25  
338  
–4.75  
49  
3.465  
46  
V
mA  
V
mA  
V
mA  
mA  
W
1, 2, 3  
1, 2, 3  
310  
–5.0  
38  
3.3  
34  
369  
3.72  
0.01  
AVEE Supply Voltage12  
I (AVEE) Current  
–5.25  
3.135  
DVCC Supply Voltage12  
I (DVCC) Current  
1, 2, 3  
1, 2, 3  
1, 2, 3  
I
CC (Total) Supply Current per Channel  
433  
4.05  
Power Dissipation (Total)  
Power Supply Rejection Ratio (PSRR)  
I
V
% FSR/% VS  
NOTES  
1 All ac specifications tested by driving ENCODE and ENCODE differentially. Single-ended input: AMP-IN-X-1 = 1 V p-p, AMP-IN-X-2 = GND.  
2 Gain tests are performed on AMP-IN-X-1 input voltage range.  
3 Full Power Bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.  
4 For differential input: +IN = 1 V p-p and –IN = 1 V p-p (signals are 180° out of phase). For single-ended input: +IN = 2 V p-p and = –IN = GND.  
5 Minimum and maximum conversion rates allow for variation in Encode Duty Cycle of 50% 5%.  
6 Analog Input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 80 MSPS. SNR  
is reported in dBFS, related back to converter full scale.  
7 Analog Input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 80 MSPS. SINAD is  
reported in dBFS, related back to converter full scale.  
8 Analog Input signal at –1 dBFS; SFDR is ratio of converter full scale to worst spur.  
9 Both input tones at –7 dBFS; two tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third order intermod product.  
10Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B Channel.  
11 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads > 10 pF will degrade performance.  
12 Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range  
AVCC = 5.0 V to 5.25 V.  
Specifications subject to change without notice.  
–3–  
REV. 0