Data Sheet
HMC674LC3C/HMC674LP3E
TIMING DESCRIPTIONS
Table 6.
Parameter
Symbol
Description
Input to Output High Delay
tPDH
The propagation delay measured from the time the input signal crosses the reference
( the input offset voltage) to the 50% point of an output low to high transition.
Input to Output Low Delay
tPDL
tPLOH
tPLOL
tH
The propagation delay measured from the time the input signal crosses the reference
( the input offset voltage) to the 50% point of an output high to low transition.
Latch Enable (LE/LE) to Output High Delay
Latch Enable (LE/LE) to Output Low Delay
Minimum Hold Time
The propagation delay measured from the 50% point of the latch enable (LE/LE)
signal high to low transition to the 50% point of an output low to high transition.
The propagation delay measured from the 50% point of the latch enable (LE/LE)
signal high to low transition to the 50% point of an output high to low transition.
The minimum time after the positive transition of the latch enable (LE/LE) signal
that the input signal must remain unchanged to be acquired and held at the outputs.
The minimum time that the latch enable (LE/LE) signal must be low to acquire an
input signal change.
Minimum Latch Enable (LE/LE) Pulse Width tPL
Minimum Setup Time
Output Rise Time
tS
The minimum time before the positive transition of the latch enable (LE/LE) signal
that an input signal change must be present to be acquired and held at the outputs.
The amount of time required to transition from a low to a high output as measured
at the 20% and 80% points.
tR
Output Fall Time
tF
The amount of time required to transition from a high to a low output as measured
at the 20% and 80% points.
Input Overdrive Voltage
VOD
The difference between the input voltages (VINP and VINN).
Timing Diagram
LATCH
TRACK
LATCH
TRACK
LATCH
LATCH ENABLE (LE)
50%
LATCH ENABLE (LE)
tPL
tS
tH
V
IN
DIFFERENTIAL
INPUT VOLTAGE
V
± V
OS
CM
V
OD
tPDL
tPLOH
Q OUTPUT
50%
50%
tF
tPDH
Q OUTPUT
tR
tPLOL
Figure 2. Timing Diagram
Rev. K | Page 5 of 14
ADI [ ADI ]
