HMC546LP2E
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Tx
1
2
3
6
5
4
RFC
HMC546LP2E
V
TOP VIEW
V
CTL
DD
(Not to Scale)
ACG
Rx
NOTES
1. EXPOSED PAD. THE PACKAGE BOTTOM
HAS AN EXPOSED METAL PADDLE THAT
MUST BE CONNECTED TO THE PRINTED
CIRCUIT BOARD (PCB) RF GROUND.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Tx
Radio Frequency (RF) Transmit. This pin is dc- coupled and not well matched to 50 Ω. External matching
components and a dc blocking capacitor are required.
2
3
4
VCTL
ACG
Rx
Control Voltage Input. For more information about the VCTL pin, see Table 4 and Figure 3.
AC Ground. An external capacitor from ACG to ground is required.
RF Receive. This pin is dc-coupled and not well matched to 50 Ω. External matching components and a
dc blocking capacitor are required.
5
6
VDD
RFC
Supply Voltage. See Figure 4 for the interface schematic.
RF Common. This pin is dc-coupled and not well matched to 50 Ω. External matching components and a
dc blocking capacitor are required.
EPAD
Exposed Pad. The package bottom has an exposed metal paddle that must be connected to the printed
circuit board (PCB) RF ground.
Table 4. Truth Table
Control Input1
Signal Path State
RFC to Rx
VCTL
0 V
VDD
0 V
High-Z
VDD
VDD
VDD
0 V
RFC to Tx
Off
On
On
On
On
Off
Off
Off
High-Z
1 VDD = 3 V to 8 V, and control input voltage tolerances are ±0.2 V dc.
INTERFACE SCHEMATICS
V
V
DD
CTL
Figure 3. VCTL Interface
Figure 4. VDD Interface
Rev. E | Page 6 of 13
ADI [ ADI ]
