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24C04WP 参数 Datasheet PDF下载

24C04WP图片预览
型号: 24C04WP
PDF下载: 下载PDF文件 查看货源
内容描述: [用于打印机墨粉的打印控制]
分类和应用:
文件页数/大小: 14 页 / 106 K
品牌: ACUTECH [ ACUTECHNOLOGY SEMICONDUCTOR ]
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Refer the following table for Slave Addresses string details:  
Acknowledge  
The NM24C04/05 device will always respond with an acknowl-  
edge after recognition of a start condition and its slave address. If  
both the device and a write operation have been selected, the  
NM24C04/05 will respond with an acknowledge after the receipt  
of each subsequent eight bit byte.  
Device A0 A1 A2 Page  
Page Block  
Blocks Addresses  
NM24C04/05  
P
A
A
2
0, 1  
A: Refers to a hardware configured Device Address pin.  
P: Refers to an internal PAGE BLOCK.  
In the read mode the NM24C04/05 slave will transmit eight bits of  
data, release the SDA line and monitor the line for an acknowl-  
edge. If an acknowledge is detected, NM24C04/05 will continue  
to transmit data. If an acknowledge is not detected,NM24C04/05  
will terminate further data transmissions and await the stop  
condition to return to the standby power mode.  
All IIC EEPROMs use an internal protocol that defines a PAGE  
BLOCK size of 2K bits (for Word addresses 0x00 through 0xFF).  
Therefore, address bits A0, A1, or A2 (if designated 'P') are used  
to access a PAGE BLOCK in conjunction with the Word address  
used to access any individual data byte.  
Device Addressing  
The last bit of the slave address defines whether a write or read  
condition is requested by the master. A '1' indicates that a read  
operation is to be executed, and a '0' initiates the write mode.  
Following a start condition the master must output the address of  
the slave it is accessing. The most significant four bits of the slave  
address are those of the device type identifier. This is fixed as  
1010 for all EEPROM devices.  
A simple review: After the NM24C04/05 recognizes the start  
condition, the devices interfaced to the IIC bus wait for a slave  
address to be transmitted over the SDA line. If the transmitted  
slave address matches an address of one of the devices, the  
designated slave pulls the line LOW with an acknowledge signal  
and awaits further transmissions.  
Device Type  
Identifier  
Device  
Address  
1
0
1
0
A2  
A1  
A0 R/W (LSB)  
Page  
NM24C04/05  
Block Address  
10  
www.fairchildsemi.com  
NM24C04/05 Rev. G