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PAC5255_18 参数 Datasheet PDF下载

PAC5255_18图片预览
型号: PAC5255_18
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Application Controller]
分类和应用:
文件页数/大小: 74 页 / 817 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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PAC5255  
Power Application Controller  
prevent or allow it to activate protection event PR2. These two protection events can be used directly by protection circuitry  
in the Application Specific Power Drivers (ASPD) to protect devices being driven.  
11.2.6. Analog Output Buffer (BUF)  
A subset of the signals from the configurable analog signal matrix CASM can be multiplexed to the BUF6 pin for external  
use. The buffer offset voltage can be minimized with the built-in swap function.  
11.2.7. Analog Front End I/O (AIO)  
Up to 10 AIOx pins are available in the device. In the analog front end I/O mode, the pin can be configured to be a digital  
input or digital open-drain output. The AIOx input or output signal can be set to a data input or output register bit, or  
multiplexed to one of the signals in the configurable digital signal matrix CDSM. The signal can be set to active high  
(default) or active low, with VSYS supply rail. Where AIO6,7,8,9 supports microcontroller interrupt for external signals. Each  
has two mask bits to prevent or allow rising or falling edge of its corresponding digital input to trigger second  
microcontroller interrupt INT2.  
11.2.8. Push Button (PBTN)  
The push button PBTN, when enabled, can be used by the microcontroller to detect a user active-low push button event and  
to put the system into an ultra-low-power hibernate mode. Once the system is in hibernate mode, PBTN can be used to  
wake up the system. In addition, PBTN can also be used as a hardware reset for the microcontroller when it is held low for  
longer than 8s during normal operation. The PBTN input is active low and has a 55kΩ pull-up resistor to 3V.  
11.2.9. HP DAC and LP DAC  
The 8-bit HP DAC can be used as the comparison voltage for the high-speed protection (HP) comparators, or routed for  
general purpose use via the AB2 signal in the CASM. The HP DAC output full scale voltage is 2.5V.  
The 10-bit LP DAC can be used as the comparison voltage for the limit protection (LP) comparators, or routed for general  
purpose use via the AB3 signal in the CASM. The LP DAC output full scale voltage is 2.5V.  
11.2.10. ADC Pre-Multiplexer  
The ADC pre-multiplexer is a 16-to-1 multiplexer that selects between the 3 differential programmable gain amplifier  
outputs, AB1 through AB9, temperature monitor signal (VTEMP), power monitor signal (VMON), and offset calibration  
reference (VREF / 2). The ADC pre-multiplexer can be directly controlled or automatically scanned by the auto-sampling  
sequencer.  
When the ADC pre-multiplexer is automatically scanned, the unbuffered or sensitive signals should be masked by setting  
appropriate register bits.  
11.2.11. Configurable Analog Signal Matrix (CASM)  
The CASM has 9 general purpose analog signals labeled AB1 through AB9 that can be used for:  
Routing the single-ended programmable gain amplifier or analog feed-through output to AB1 through AB9  
Routing an analog signal via AB1, AB2, or AB3 to the negative input of a general purpose comparator or  
phase comparator  
Routing the 8-bit HP DAC output to AB2  
Routing the 10-bit LP DAC output to AB3  
Routing analog signals via AB1 through AB12 to the ADC pre-multiplexer  
Routing phase comparator feed-through signals to AB7, AB8, and AB9, and averaged voltage to AB1  
11.2.12. Configurable Digital Signal Matrix (CDSM)  
The CDSM has 7 general purpose bi-directional digital signals labeled DB1 through DB7 that can be used for:  
Routing the AIOx input to or output signals from DB1 through DB7  
Routing the general purpose comparator output signals to DB1 through DB7  
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Rev 1.10‒March 3, 2018  
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