PAC5255
Power Application Controller
Table 6. Application Specific Power Drivers Pin Description
PIN NAME
PIN NUMBER
TYPE
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
Analog
O
DESCRIPTION
DRL0
DRL1
DRL2
DRL3
DRL4
DRL5
DXB0
DXB1
DXB2
DXH0
DXH1
DXH2
DXS0
DXS1
DXS2
25
26
27
29
32
33
36
39
42
35
38
41
34
37
40
30
28
31
Low-side gate driver 0.
Low-side gate driver 1.
Low-side gate driver 2.
Low-side gate driver 3.
Low-side gate driver 4.
Low-side gate driver 5.
Ultra-high-voltage high-side gate driver bootstrap 0.
Ultra-high-voltage high-side gate driver bootstrap 1.
Ultra-high-voltage high-side gate driver bootstrap 2.
Ultra-high-voltage high-side gate driver 0.
Ultra-high-voltage high-side gate driver 1.
Ultra-high-voltage high-side gate driver 2.
Ultra-high-voltage high-side gate driver source 0.
Ultra-high-voltage high-side gate driver source 1.
Ultra-high-voltage high-side gate driver source 2.
Low-speed clock output/High-side driver group 2 control enable output.
Medium-voltage open-drain driver 0.
CLKOUT/ENHS2
OM0
OD
OM2
OD
Medium-voltage open-drain driver 2.
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Rev 1.10‒March 3, 2018