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PAC5225QM 参数 Datasheet PDF下载

PAC5225QM图片预览
型号: PAC5225QM
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Application Controller]
分类和应用:
文件页数/大小: 71 页 / 931 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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PAC5225  
Power Application Controller  
data.  
18.3. UART Controller  
The UART peripheral is a configurable peripheral that can support various features and modes of operation:  
Programmable clock selection  
National Instruments PC16550D compatible  
16-deep transmit and receive FIFO and fractional clock divisor  
Up to 3.125Mbps communication speed (with HCLK = 50MHz)  
The UART peripheral may operate either by polling, or can be configured to be interrupt driven for both receive and  
transmit data.  
18.4. SPI Controller  
The device contains an SPI controller that can each be used in either master or slave operation, with the following features:  
SPI master operation  
Control of up to three different SPI slaves  
Operation up to 25MHz  
Flexible multiple transmit mode for variable-size SPI data with user-defined chip-select behavior  
Chip select “shaping” through programmable additional delay for chip-select setup, hold and wait time  
for back-to-back transfers  
SPI master or slave operation  
Supports clock phase and polarity control  
Data transmission/reception can be on 8-, 16-, 24- or 32-bit boundary  
Selectable data bit ordering (LSB or MSB first)  
Programmable chip select polarity  
Selectable “auto-retransmit” mode  
The SPI peripheral may operate either by polling, or can be configured to be interrupt driven for both receive and transmit  
data.  
- 58 -  
Rev 2.0‒September 22, 2017  
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