PAC5225
Power Application Controller
Each protection comparator has a mask bit to prevent or allow it to trigger the main microcontroller interrupt INT1. Each
protection comparator also has one mask bit to prevent or allow it to activate protection event PR1, and another mask bit to
prevent or allow it to activate protection event PR2. These two protection events can be used directly by protection circuitry
in the Application Specific Power Drivers (ASPD) to protect devices being driven.
11.2.6. Analog Output Buffer (BUF)
A subset of the signals from the configurable analog signal matrix CASM can be multiplexed to the BUF6 pin for external
use. The buffer offset voltage can be minimized with the built-in swap function.
11.2.7. Analog Front End I/O (AIO)
Up to 10 AIOx pins are available in the device. In the analog front end I/O mode, the pin can be configured to be a digital
input or digital open-drain output. The AIOx input or output signal can be set to a data input or output register bit, or
multiplexed to one of the signals in the configurable digital signal matrix CDSM. The signal can be set to active high
(default) or active low, with VSYS supply rail. Where AIO6,7,8,9 supports microcontroller interrupt for external signals. Each
has two mask bits to prevent or allow rising or falling edge of its corresponding digital input to trigger second
microcontroller interrupt INT2.
11.2.8. Push Button (PBTN)
The push button PBTN, when enabled, can be used by the microcontroller to detect a user active-low push button event and
to put the system into an ultra-low-power hibernate mode. Once the system is in hibernate mode, PBTN can be used to
wake up the system. In addition, PBTN can also be used as a hardware reset for the microcontroller when it is held low for
longer than 8s during normal operation. The PBTN input is active low and has a 55kΩ pull-up resistor to 3V.
11.2.9. HP DAC and LP DAC
The 8-bit HP DAC can be used as the comparison voltage for the high-speed protection (HP) comparators, or routed for
general purpose use via the AB2 signal in the CASM. The HP DAC output full scale voltage is 2.5V.
The 10-bit LP DAC can be used as the comparison voltage for the limit protection (LP) comparators, or routed for general
purpose use via the AB3 signal in the CASM. The LP DAC output full scale voltage is 2.5V.
11.2.10. CLKOUT
There is a low-speed clock output that may be enabled and configured on this device. The clock output is disabled by
default and may be enabled or disabled through a register bit. The clock output may be configured for 580Hz or 1.16kHz.
This clock output is useful for generating a second clock source that is needed by UL or IEC60730 Class B Safety
standards. This output may be connected to a digital input on the PCB on this device so that the MCU firmware may detect
any issues with the clock such as failure, or drifting of the frequency.
The CLKOUT pin is shared with PA7, as an open-drain output. If the CLKOUT pin is enabled, then PA7 may be
configured as a weak-pull up or a high-impedance input, with a 100k pull-up resistor that connects PA7 to VCCIO. The
digital input functions will still be enabled, but no output functions are allowed.
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Rev 2.0‒September 22, 2017
ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
