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PAC5223_17 参数 Datasheet PDF下载

PAC5223_17图片预览
型号: PAC5223_17
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Application Controller]
分类和应用:
文件页数/大小: 70 页 / 931 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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PAC5223  
Power Application Controller  
Figure 10-5. Linear Regulators  
VP  
V
V
(15V typical)  
P
PAC5223  
& V  
(5V)  
CCIO  
REGO  
VSYS  
SYS  
4.7µF  
(1)  
VCCIO  
VCC33  
VCC18  
VSS  
VSSA  
1µF  
1µF  
(1) 5V I/O connection shown.  
Connect instead to a 4.7µF  
capacitor for 3.3V I/O.  
10.3.3. Power Up Sequence  
The MMPM follows a typical power up sequence as in the Figure 10-6 below. A typical sequence begins with input power  
supply being applied, followed by the safe start up and start up durations to bring the switching supply output VP to 15V,  
before the linear regulators are enabled. When all the supplies are ready, the internal clocks become available, and the  
microcontroller starts executing from the program memory. During initialization, the microcontroller can reconfigure the  
switching supply to a different VP regulation voltage such as 15V and to an appropriate switching frequency and switching  
mode. The total loading on the switching supply must be kept below 25% of the maximum output current until after the  
reconfiguration of the switching supply is complete. For AC input supply applications, the start up sequence includes an  
additional charging time for VHM depending on the start-up resistor and capacitor values.  
Figure 10-6. Power Up Sequence  
Power-on-  
reset delay  
Regulators  
enabled  
Reconfiguration by firmware  
Safe start up  
Start up  
6ms  
System operation  
SOC.PWRCFG.TRESET + 10.5 ms  
(default: 32ms + 10.5ms = 42.5ms)  
V
or V  
HM  
IN  
7.4V  
V
V
V
V
V
or V  
HM  
IN  
V
(5V/9V/12V/15V)  
P
V
(start up default)  
P
4.3V  
P
V
and V  
V
(5V)  
CCIO  
SYS  
4V  
and V  
SYS  
CC33  
CC18  
CCIO  
(3.3V)  
(1.8V)  
CC33  
V
CC18  
87%  
Internal clocks  
Power on reset  
Microcontroller  
reset  
Microcontroller  
executing  
Microcontroller  
initializing  
10.3.4. Hibernate Mode  
The IC can go into an ultra-low power hibernate mode via the microcontroller firmware or via the optional push button  
(PBTN, see Push Button description in Configurable Analog Front End). In hibernate mode, only a minimal amount  
(typically 18µA) of current is used by VHM, and the MMSS controller and all internal regulators are shut down to eliminate  
power drain from the output supplies. The system exits hibernate mode after a wake-up timer duration (configurable from  
- 23 -  
Rev 1.17‒September 20, 2017  
 
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