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PAC5220_17 参数 Datasheet PDF下载

PAC5220_17图片预览
型号: PAC5220_17
PDF下载: 下载PDF文件 查看货源
内容描述: [Power Application Controller]
分类和应用:
文件页数/大小: 69 页 / 841 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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PAC5220  
Power Application Controller  
9. PIN DESCRIPTION  
Table 9-1. Multi-Mode Power Manager and System Pin Description  
PIN  
NAME  
PIN NUMBER  
TYPE  
Analog  
Analog  
Power  
Power  
DESCRIPTION  
Switching supply current sense input. Connect to the positive side of the current  
sense resistor.  
CSM  
20  
23  
EP  
19  
Switching supply driver output. Connect to the base or gate of the external power  
NPN or n-channel MOSFET. See PAC User Guide and application notes.  
DRM  
Exposed pad. Must be connected to VSS in a star ground configuration. Connect to  
a large PCB copper area for power dissipation heat sinking.  
EP (VSS)  
REGO  
System regulator output. Connect to VSYS directly or through an external power-  
dissipating resistor.  
Internally generated 1.8V core power supply. Connect a 2.2μF or higher value  
ceramic capacitor from VCC18 to VSSA. See Figure 9-1. Power Supply Bypass  
Capacitor Routing below.  
VCC18  
VCC33  
VCCIO  
56  
5
Power  
Power  
Power  
Internally generated 3.3V power supply. Connect a 2.2μF or higher value ceramic  
capacitor from VCC33 to VSSA. See PCB layout note below.  
Internally generated digital I/O power supply. Connect a 4.7μF or higher value  
ceramic capacitor from VCCIO to VSSA. See Figure 9-1. Power Supply Bypass  
Capacitor Routing below.  
53  
Switching supply controller supply input. Connect a 1μF or higher value ceramic  
capacitor, or a 0.1μF ceramic capacitor in parallel with a 10μF or higher electrolytic  
capacitor from VHM to VSSP. This pin requires good capacitive bypassing to VSSP, so  
the ceramic capacitor must be connected with a shorter than 10mm trace from the  
pin. See Figure 9-1. Power Supply Bypass Capacitor Routing below.  
VHM  
VP  
22  
21  
Power  
Power  
Main power supply. Provides power to the power drivers as well as voltage  
feedback path for the switching supply. Connect a properly sized supply bypass  
capacitor in parallel with a 0.1μF ceramic capacitor from VP pin to VSS for voltage  
loop stabilization. This pin requires good capacitive bypassing to VSS, so the  
ceramic capacitor must be connected with a shorter than 10mm trace from the pin.  
See See Figure 9-1. Power Supply Bypass Capacitor Routing below.  
VSS  
7
6
Power  
Power  
Power  
Ground.  
VSSA  
VSSP  
Analog ground. Connect to VSS in a star ground configuration.  
Power ground. Connect to VSS in a star ground configuration.  
24  
5V system power supply. Connect a 4.7μF or higher value ceramic capacitor from  
VSYS to VSSP. See Figure 9-1. Power Supply Bypass Capacitor Routing below.  
VSYS  
18  
Power  
XIN  
54  
55  
Analog  
Analog  
Crystal oscillator driver input. Leave floating if unused.  
Crystal oscillator driver output. Leave floating if unused.  
XOUT  
- 14 -  
Rev 1.5‒April 17, 2016  
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