ACT8946AQJ203-T
Rev 1.0, 08-Jul-16
PIN DESCRIPTIONS CONT’D
PIN
26
NAME
SCL
DESCRIPTION
Clock Input for I2C Serial Interface.
27
SDA
Data Input for I2C Serial Interface. Data is read on the rising edge of SCL.
Active-Low Open-Drain Charger Status Output. nSTAT has a 8mA (typ) current limit, allowing it
to directly drive an indicator LED without additional external components. See the Charge Status
Indicator section for more information.
28
nSTAT
29, 30
31, 32
BAT
Battery Charger Output. Connect this pin directly to the battery anode (+ terminal)
System Output Pin. Bypass to GA with a 10µF or larger ceramic capacitor.
VSYS
Power Input for the Battery Charger. Bypass CHGIN to GA with a capacitor placed as close to
the IC as possible.
33
34
CHGIN
OUT2
Output Feedback Sense for REG2.
Power Input for REG2. Bypass to GP12 with a high quality ceramic capacitor placed as close to
the IC as possible.
35
36
37
38
39
VP2
SW2
GP12
SW1
VP1
Switching Node Output for REG2.
Power Ground for REG1 and REG2. Connect GA, GP12 and GP3 together at a single point as
close to the IC as possible.
Switching Node Output for REG1.
Power Input for REG1. Bypass to GP12 with a high quality ceramic capacitor placed as close to
the IC as possible.
40
NC1
EP
No Connect. Not internally connected.
EP
Exposed Pad. Must be soldered to ground on PCB.
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