ACT8946AQJ203-T
Rev 1.0, 08-Jul-16
SYSTEM CONTROL INFORMATION
Interfacing with the Hi351E Processors
Table 2: ACT8946AQJ203 and Hi3518E Power Domains
POWER DOMAIN
ACT8946A CHANNEL TYPE DEFAULT VOLTAGE CURRENT CAPABILITY
V_Core_D
REG1
REG2
DC/DC
DC/DC
1.1V
1.8V
1100mA
1100mA
V_Core_A
V_DDR
V_IO
REG3
DC/DC
1.8V
1100mA
REG4
REG5
REG6
REG7
LDO
LDO
LDO
LDO
3.3V
320mA
320mA
320mA
320mA
-
-
-
Auxiliary 1
Auxiliary 2
Auxiliary 3
Many of the ACT8946A's functions support
interrupt-generation as result of various
Control Signals
a
conditions. These are typically masked by default,
but may be unmasked via the I2C interface. For
more information about the available fault
conditions, refer to the appropriate sections of this
datasheet.
Enable Inputs
The ACT8946A features a variety of control inputs,
which are used to enable and disable outputs
depending upon the desired mode of operation.
PWRHLD is a logic input,
Note that under some conditions a false interrupt
may be generated upon initial startup. For this
reason, it is recommended that the interrupt service
routine check and validate nSYSLEVMSK[-] and
nFLTMSK[-] bits before processing an interrupt
generated by these bits. These interrupts may be
validated by nSYSSTAT[-], OK[-] bits.
nIRQ Output
nIRQ is an open-drain output that asserts low any
time an interrupt is generated. Connect a 10kΩ or
greater pull-up resistor from nIRQ to an appropriate
voltage supply. nIRQ is typically used to drive the
interrupt input of the system processor.
Figure 2: ACT8946AQJ203-T Enable/Disable Sequence
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