ACT8865
Rev 2, 11-Feb-14
REGISTER AND BIT DESCRIPTIONS CONT’D
OUTPUT ADDRESS BIT
NAME
ACCESS
DESCRIPTION
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG1
REG2
0x22
0x30
[0]
OK
-
R/W
[7:6]
Reserved.
R
Primary Output Voltage Selection. Valid when VSEL is driven
low. See the Output Voltage Programming section for more
information.
REG2
REG2
REG2
0x30
0x31
0x31
[5:0]
[7:6]
[5:0]
VSET1
-
R/W
R
Reserved.
Secondary Output Voltage Selection. Valid when VSEL is
driven high. See the Output Voltage Programming section for
more information.
VSET2
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG2
REG2
0x32
0x32
[7]
[6]
ON
R/W
R/W
Regulator Phase Control. Set bit to 1 for regulator to operate
180° out of phase with the oscillator, clear bit to 0 for regulator
to operate in phase with the oscillator.
PHASE
Regulator Mode Select. Set bit to 1 for fixed-frequency PWM
under all load conditions, clear bit to 0 to transit to power-
savings mode under light-load conditions.
REG2
0x32
[5]
MODE
R/W
Regulator Turn-On Delay Control. See the REG1, REG2,
REG3 Turn-on Delay section for more information.
REG2
REG2
0x32
0x32
[4:2]
[1]
DELAY
R/W
R/W
Regulator Fault Mask Control. Set bit to 1 enable to fault-
interrupts, clear bit to 0 to disable fault-interrupts.
nFLTMSK
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG2
REG3
0x32
0x40
[0]
OK
-
R/W
R
[7:6]
Reserved.
Primary Output Voltage Selection. Valid when VSEL is driven
low. See the Output Voltage Programming section for more
information.
REG3
REG3
REG3
0x40
0x41
0x41
[5:0]
[7:6]
[5:0]
VSET1
-
R/W
R
Reserved.
Secondary Output Voltage Selection. Valid when VSEL is
driven high. See the Output Voltage Programming section for
more information.
VSET2
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG3
REG3
0x42
0x42
[7]
[6]
ON
R/W
R/W
Configures regulator behavior with respect to the nPBIN input.
Set bit to 0 to enable regulator when nPBIN is asserted.
PWRSTAT
Regulator Mode Select. Set bit to 1 for fixed-frequency PWM
under all load conditions, clear bit to 0 to transition to power-
savings mode under light-load conditions.
REG3
0x42
[5]
MODE
R/W
Regulator Turn-On Delay Control. See the REG1, REG2,
REG3 Turn-on Delay section for more information.
REG3
REG3
0x42
0x42
[4:2]
[1]
DELAY
R/W
R/W
Regulator Fault Mask Control. Set bit to 1 enable to fault-
interrupts, clear bit to 0 to disable fault-interrupts.
nFLTMSK
Regulator Power-OK Status. Value is 1 when output voltage
exceeds the power-OK threshold, value is 0 otherwise.
REG3
REG4
REG4
0x42
0x50
0x50
[0]
OK
-
R/W
R
[7:6]
[5:0]
Reserved.
Output Voltage Selection. See the Output Voltage
Programming section for more information.
VSET
R/W
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear
bit to 0 to disable the regulator.
REG4
0x51
[7]
ON
R/W
Innovative PowerTM
www.active-semi.com
- 11 -
Active-Semi Proprietary―For Authorized Recipients and Customers
ActivePMUTM is a trademark of Active-Semi.
Copyright © 2014 Active-Semi, Inc.
I2CTM is a trademark of NXP.