ACT8847
Rev 5, 15-Nov-12
SYSTEM CONTROL INFORMATION
Interfacing with the Samsung S5PC210/S5PV310 processors
The ACT8847 is optimized for the Samsung
S5PC210/S5PV310 and other application
processors, supporting both the power domains as
well as the signal interface. The following
paragraphs describe how to design ACT8847 with
the S5PC210/S5PV310 processors.
cases where the description of interconnections
between these devices benefits by doing so, both
the
S5PC210/S5PV310 processors pin names are
provided. When this is done, the
ACT8847
pin
names
and
the
S5PC210/S5PV310 pin names are located after the
ACT8847 pin names, and are italicized and located
inside parentheses. For example, PWREN
(XPWRRGTON) refers to the logic signal applied to
the ACT8847's PWREN input, identifying that it is
driven from the S5PC210's XPWRRGTON output.
While the ACT8847 supports many possible
configurations for powering these processors, one
of the most common configurations is detailed in
this datasheet. In general, this document refers to
the ACT8847 pin names and functions. However, in
Table 1:
ACT8847 and Samsung S5PC210 Power Domains
ACT8847
REGULATOR
DEFAULT
VOLTAGE CURRENT
MAX
POWER UP
ORDER
ON/OFF @
SLEEP
POWER DOMAIN
TYPE
VDD_MEM,
VDD12_SLP_ON
REG1
1.2V
1.5A
7
ON
DC/DC Step Down
REG2
REG3
REG4
REG5
REG6
REG7
REG8
REG9
VDD_ARM
VDD_G3D
1.2V
1.1V
1.1V
1.1V
1.1V
3.3V
1.8V
3.3V
2.8A
2.8A
3
4
OFF
OFF
OFF
OFF
ON
DC/DC Step Down
DC/DC Step Down
DC/DC Step Down
Low-Noise LDO
Low-Noise LDO
Low-Noise LDO
Low-Noise LDO
Low-Noise LDO
VDD_INT
1.5A
2
VDD_PLL
150mA
150mA
350mA
350mA
350mA
5
VDD_ALIVE
1
VDD33_SLP_ON
VDD18_SLP_OFF
VDD33_SLP_OFF
6
ON
11
12
OFF
OFF
REG10
REG11
VDD12_SLP_OFF
VDD11_SLP_OFF
1.2V
1.1V
150mA
350mA
10
9
OFF
OFF
Low Input-Voltage LDO
Low Input-Voltage LDO
REG12
REG13
VDD18_SLP_ON
VDD_RTC
1.8V
1.8V
350mA
50mA
8
0
ON
ON
Low Input-Voltage LDO
Always-ON LDO
Table 2:
ACT8847 and Samsung S5PC210 Power Mode
Power Mode
Control State
Power Domain State
Quiescent Current
PWRHLD is asserted, PWREN is
asserted
ALL ON
All Regulators ON
0.6mA
PWRHLD is asserted, PWREN is de- REG1/6/7/12/13 are ON, all
asserted other regulators are off.
PWRHLD is de-asserted, PWREN is REG13 is ON, all other regula-
SLEEP
SHUTDOWN
ALL OFF
200µA
10µA
5µA
de-asserted, VINL2 > 2.6V
tors are off.
PWRHLD is de-asserted, PWREN is
de-asserted, VINL2 < 2.2V
All regulators off.
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