ACT8796
Rev1, 10-Oct-08
LOW-DROPOUT LINEAR REGULATORS
FUNCTIONAL DESCRIPTION
Power-OK
General Description
Each of the LDOs features power-OK status bit that
REG4, REG5, and REG6 are low-noise, low-
dropout linear regulators (LDOs) that are optimized
for low noise and high-PSRR operation, achieving
more than 60dB PSRR at frequencies up to 10kHz.
can be read by the system microprocessor via the
I2C interface. If an output voltage is lower than the
power-OK threshold, typically 6% below the pro-
grammed regulation voltage, the corresponding
REG456CFG/OKx[ ] will clear to 0.
LDO Output Voltage Programming
All LDOs feature independently-programmable out-
put voltages that are set via the I2C serial interface,
increasing the ACT8796’s flexibility while reducing
total solution size and cost. Set the output voltage
by writing to the REG456CFG/VSETx[ ] registers.
Reference Bypass Pin
The ACT8796 contains a reference bypass pin
which filters noise from the reference, providing a
low noise voltage reference to the LDOs. Bypass
REF to G with a 0.01µF ceramic capacitor.
Output Current Capability
Optional LDO Output Discharge
REG4, REG5, and REG6 each supply an output
current of 250mA. Excellent performance is
achieved over this load current range.
Each of the ACT8796’s LDOs features an optional,
independent output voltage discharge feature.
When this feature is enabled, the LDO output is
discharged to ground through a 1kꢀ resistance
when the LDO is shutdown. This feature may be
enabled or disabled via the I2C interface by writing
to the REG456CFG/DISx[ ] bits.
Output Current Limit
In order to ensure safe operation under over-load
conditions, each LDO features current-limit circuitry
with current fold-back. The current-limit circuitry
limits the current that can be drawn from the output,
providing protection in over-load conditions. For
additional protection under extreme over current
conditions, current-fold-back protection reduces the
current-limit by approximately 30% under extreme
overload conditions.
Output Capacitor Selection
REG4, REG5, and REG6 each require only a small
ceramic capacitor for stability. For best perform-
ance, each output capacitor should be connected
directly between the OUTx and G pins as possible,
with a short and direct connection. To ensure best
performance for the device, the output capacitor
should have a minimum capacitance of 1µF, and
ESR value between 10mꢀ and 200mꢀ. High quality
ceramic capacitors such as X7R and X5R dielectric
types are strongly recommended.
Enabling and Disabling the LDOs
REG4 is enabled whenever either of the following
conditions are met:
1) nMSTR is driven low, or
2) PWRHLD is asserted high.
Furthermore, once these conditions are met REG5
and REG6 maybe independently enabled or dis-
abled via the I2C serial interface by writing the ap-
propriate REG56/ONx[_] bit.
Innovative PowerTM
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