ACT8796
Rev1, 10-Oct-08
STEP-DOWN DC/DC CONVERTERS
FUNCTIONAL DESCRIPTION
Programming the Output Voltage
General Description
By default, REG1, REG2, and REG3 each power
up and regulate to their default output voltage.
Once the system is enabled, each regulator's output
voltage may be independently programmed to a
different value, typically in order to reduce the
power consumption of a microprocessor in standby
mode. Program the output voltages via the I2C se-
rial interface by writing to the REGx/VSETx[ ] and
REGx/VRANGE[ ] registers.
REG1, REG2, and REG3 are fixed-frequency, cur-
rent-mode, synchronous PWM step down convert-
ers that achieve peak efficiencies of up to 97%.
REG1 and REG2 are capable of supplying up to
750mA of output current, while REG3 supports up
to 550mA. These regulators operate with a fixed
frequency of 1.6MHz, minimizing noise in sensitive
applications and allowing the use of small external
components. Each of the step-down DC/DCs are
available with a variety of standard and custom out-
put voltages, and each may be software-controlled
via the I2C interface by systems that require ad-
vanced power management functions.
Programmable Operating Mode
By default, REG1, REG2 ,and REG3 each operate
in fixed-frequency PWM mode at medium to heavy
loads, then transition to a proprietary power-saving
mode at light loads in order to save power. In appli-
cations where low noise is critical, force fixed-
frequency PWM operation across the entire load
current range, at the expense of light-load effi-
ciency, by setting the REGx/MODE[ ] bit to [1].
100% Duty Cycle Operation
REG1, REG2, and REG3 are each capable of oper-
ating at up to 100% duty cycle. During 100% duty-
cycle operation, the high-side power MOSFET is
held on continuously, providing a direct connection
from the input to the output (through the inductor),
ensuring the lowest possible dropout voltage in bat-
tery powered applications.
Power-OK
REG1, REG2, and REG3 each feature a variety of
status bits that can be read by the system micro-
processor. If either output voltage is lower than the
power-OK threshold, typically 6% below the pro-
grammed regulation voltage, REGx/OK[ ] will clear
to 0.
Synchronous Rectification
REG1, REG2, and REG3 each feature integrated n-
channel synchronous rectifiers, maximizing effi-
ciency and minimizing the total solution size and
cost by eliminating the need for external rectifiers.
Soft-Start
REG1, REG2, and REG3 each include matched
soft-start circuitry. When enabled, the output volt-
ages track the internal 80µs soft-start ramp and
both power up in a monotonic manner that is inde-
pendent of loading on either output. This circuitry
ensures that each output powers up in a controlled
manner, greatly simplifying power sequencing de-
sign considerations.
Enabling and Disabling REG1, REG2,
and REG3
Enable/disable functionality is typically implemented
as part of a controlled enable/disable scheme utiliz-
ing nMSTR and other system control features of the
ACT8796. REG1 and REG2 are automatically en-
abled whenever either of the following conditions re
met:
Compensation
REG1, REG2, and REG3 utilize current-mode con-
1) nMSTR is driven low, or
2) PWRHLD is asserted high.
trol and
a
proprietary internal compensation
scheme to simultaneously simplify external compo-
nent selection and optimize transient performance
over their full operating range. No compensation
design is required; simply follow a few simple guide-
lines described below when choosing external com-
ponents.
When none of these conditions are true, or if a
regulator’s ON[_] bit is set to [0], REG1 and REG2
are disabled, and each regulator’s quiescent supply
current drops to less than 1µA.
REG3 is enabled whenever ON3 is asserted high,
and is disabled whenever ON is asserted low or if
the REG3/ON[_] bit is set to [0].
Innovative PowerTM
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ActivePMUTM is a trademark of Active-Semi.
I2CTM is a trademark of Philips Electronics.
Copyright © 2008 Active-Semi, Inc.
ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
