ACT8740
Rev PrB, 25-Feb-08
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
Power Input for the Battery Charger. The Battery Charger, REG1 and REG3 are automatically
enabled whenever a valid voltage is present on VIN. Bypass to GA with a high quality ceramic
capacitor placed as close as possible to the IC.
1
VIN
2
3
SCL
SDA
Clock Input for I2C Serial Interface. Data is read on the rising edge of the clock.
Data Input for I2C Serial Interface. Data is read on the rising edge of the clock.
Open-Drain Push-Button Status Output. nIRQ is an open-drain output which sinks current when
nMSTR is asserted or when a fault-condition occurs. If interrupts are not masked.
4
5
6
nIRQ
nMSTR Master Enable Input. Drive nMSTR to GA or to a logic low to enable the IC.
Output voltage for REG3. Capable of delivering up to 350mA of output current. Output has high
impedance when disabled.
OUT3
Power input for REG3, REG4 and REG5. Bypass to GA with a high quality ceramic capacitor
placed as close as possible to the IC.
7
8
9
INL
Output voltage for REG5. Capable of delivering up to 250mA of output current. Output has high
impedance when disabled.
OUT5
Output voltage for REG4. Capable of delivering up to 250mA of output current. Output has high
impedance when disabled.
OUT4
Power Ground for REG1. Connect GA, GP1 and GP2 together at a single point as close to the
IC as possible.
10
11
12
GP1
SW1
VP1
Switching Node Output for REG1. Connect this pin to the switching end of the inductor.
Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as
possible to the IC.
Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the
internal feedback network to the output voltage.
13
14,17
15
OUT1
GA
Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 and GP2 to-
gether at a single point as close to the IC as possible.
Enable Control Input for REG1 and REG3. Drive ON1 to VSYS or to a logic high for normal
operation, drive to GA or a logic low to disable REG1 and REG3.
ON1
Power Bypass for System Management Circuitry. Bypass to GA with a high quality ceramic
capacitor placed as close as possible to the IC. VSYS is internally connected to the higher volt-
age of either VVIN or VBAT. Do not load VSYS with more than 100µA.
16
VSYS
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I2CTM is a trademark of Philips Electronics.
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