ACT8740
Rev PrB, 25-Feb-08
LOW-NOISE, LOW-DROPOUT, LINEAR REGULATORS
FUNCTIONAL DESCRIPTION
Optional LDO Output Discharge
General Description
Each of the ACT8740’s LDOs features an optional,
independent output voltage discharge feature.
When this feature is enabled, the LDO output is
discharged to ground through a 1kꢀ resistance
when the LDO is shutdown. This feature may be
enabled or disabled via the I2C interface by writing
to the REG345CFG/DISx[ ] bits.
REG3, REG4, and REG5 are low-noise, low-
dropout linear regulators (LDOs) that are optimized
for low-noise and high-PSRR operation, achieving
more than 60dB PSRR at frequencies up to 10kHz.
LDO Output Voltage Programming
All LDOs feature independently-programmable out-
put voltages that are set via the I2C serial interface,
increasing the ACT8740’s flexibility while reducing
total solution size and cost. Set the output voltage
by writing to the REG345CFG/VSETx[ ] registers.
Output Capacitor Selection
REG3, REG4, and REG5 each require only a small
ceramic capacitor for stability. For best perform-
ance, each output capacitor should be connected
directly between the OUTx and G pins as possible,
with a short and direct connection. To ensure best
performance for the device, the output capacitor
should have a minimum capacitance of 1µF, and
ESR value between 10mꢀ and 200mꢀ. High
quality ceramic capacitors such as X7R and X5R
dielectric types are strongly recommended.
Output Current Capability
REG3, REG4, and REG5 each supply 250mA of
load current. Excellent performance is achieved
over each regulator's entire load current ranges.
Output Current Limit
In order to ensure safe operation under over-load
conditions, each LDO features current-limit circuitry
with current fold-back. The current-limit circuitry
limits the current that can be drawn from the output,
providing protection in over-load conditions. For
additional protection under extreme over current
conditions, current-fold-back protection reduces the
current-limit by approximately 30% under extreme
overload conditions.
PCB Layout Considerations
The ACT8740’s LDOs provide good DC, AC, and
noise performance over a wide range of operating
conditions, and are relatively insensitive to layout
considerations. When designing a PCB, however,
careful layout is necessary to prevent other circuitry
from degrading LDO performance.
A good design places input and output capacitors
as close to the LDO inputs and output as possible,
and utilizes a star-ground configuration for all regu-
lators to prevent noise-coupling through ground.
Output traces should be routed to avoid close prox-
imity to noisy nodes, particularly the SW nodes of
the DC/DCs.
Enabling and Disabling the LDOs
All LDOs feature independent enable/disable con-
trol via the I2C serial interface. Independently en-
able or disable each output by writing to the appro-
priate REG345CFG/ONx[ ] bit.
REFBP is a filtered reference noise, and internally
has a direct connection to the linear regulator con-
troller. Any noise injected onto REFBP will directly
affect the outputs of the linear regulators, and
therefore special care should be taken to ensure
that no noise is injected to the outputs via REFBP.
As with the LDO output capacitors, the REFBP by-
pass capacitor should be placed as close to the IC
as possible, with short, direct connections to the
star-ground. Avoid the use of vias whenever possi-
ble. Noisy nodes, such as from the DC/DCs, should
be routed as far away from REFBP as possible.
Power-OK
Each of the LDOs features Power-OK status bit that
can be read by the system microprocessor via the
I2C interface. If an output voltage is lower than the
power-OK threshold, typically 6% below the pro-
grammed regulation voltage, the corresponding
REG345CFG/OKx[ ] will clear to 0.
Reference Bypass Pin
The ACT8740 contains a reference bypass pin
which filters noise from the reference, providing a
low-noise voltage reference to the LDOs. Bypass
REF to G with a 0.01µF ceramic capacitor.
Innovative Products. Active Solutions.
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