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ACT8600QJ162-T 参数 Datasheet PDF下载

ACT8600QJ162-T图片预览
型号: ACT8600QJ162-T
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的PMU的君正JZ4760 / 60B / 70处理器 [Advanced PMU for Ingenic JZ4760/60B/70 Processors]
分类和应用:
文件页数/大小: 50 页 / 776 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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ACT8600  
Rev 3, 15-Nov-12  
REGISTER AND BIT DESCRIPTIONS CONT’D  
OUTPUT ADDRESS BIT  
NAME  
ACCESS  
DESCRIPTION  
REG3  
REG3  
0x30  
0x30  
[7:6]  
[5:0]  
-
R
Reserved.  
Output Voltage Selection. See the Output Voltage  
Programming section for more information.  
VSET  
R/W  
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear  
bit to 0 to disable the regulator.  
REG3  
REG3  
0x32  
0x32  
[7]  
ON  
-
R/W  
R
[6:3]  
Reserved.  
Regulator Phase Control. Set bit to 1 for the regulator to  
operate 180° out of phase with the oscillator, clear bit to 0 for  
the regulator to operate in phase with the oscillator.  
REG3  
0x32  
[2]  
PHASE  
R/W  
Regulator Fault Mask Control. Set bit to 1 enable fault-  
interrupts, clear bit to 0 to disable fault-interrupts.  
REG3  
REG3  
REG4  
REG4  
REG4  
0x32  
0x32  
0x40  
0x41  
0x41  
[1]  
[0]  
nFLTMSK  
R/W  
R
Regulator Power-OK Status. Value is 1 when output voltage  
exceeds the power-OK threshold, value is 0 otherwise.  
OK  
VSET  
ON  
-
Output Voltage Selection. See the Output Voltage  
Programming section for more information.  
[7:0]  
[7]  
R/W  
R/W  
R
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear  
bit to 0 to disable the regulator.  
[6:1]  
Reserved.  
Regulator Power-OK Status. Value is 1 when output voltage  
exceeds the power-OK threshold, value is 0 otherwise.  
REG4  
REG5  
REG5  
0x41  
0x50  
0x50  
[0]  
OK  
-
R
R
[7:6]  
[5:0]  
Reserved.  
Output Voltage Selection. See the Output Voltage  
Programming section for more information.  
VSET  
R/W  
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear  
bit to 0 to disable the regulator.  
REG5  
REG5  
0x51  
0x51  
[7]  
ON  
-
R/W  
R
[6:3]  
Reserved.  
Output Discharge Control. When activated, LDO output is  
discharged to GA through 1.5kresistor when in shutdown.  
Set bit to 1 to enable output voltage discharge in shutdown,  
clear bit to 0 to disable this function.  
REG5  
REG5  
0x51  
0x51  
[2]  
[1]  
DIS  
R/W  
R/W  
Regulator Fault Mask Control. Set bit to 1 enable fault-  
interrupts, clear bit to 0 to disable fault-interrupts.  
nFLTMSK  
Regulator Power-OK Status. Value is 1 when output voltage  
exceeds the power-OK threshold, value is 0 otherwise.  
REG5  
REG6  
REG6  
0x51  
0x60  
0x60  
[0]  
OK  
-
R
R
[7:6]  
[5:0]  
Reserved.  
Output Voltage Selection. See the Output Voltage  
Programming section for more information.  
VSET  
R/W  
Regulator Enable Bit. Set bit to 1 to enable the regulator, clear  
bit to 0 to disable the regulator.  
REG6  
REG6  
0x61  
0x61  
[7]  
ON  
-
R/W  
R
[6:3]  
Reserved.  
Output Discharge Control. When activated, LDO output is  
discharged to GA through 1.5kresistor when in shutdown.  
Set bit to 1 to enable output voltage discharge in shutdown,  
clear bit to 0 to disable this function.  
REG6  
0x61  
[2]  
DIS  
R/W  
Regulator Fault Mask Control. Set bit to 1 enable fault-  
interrupts, clear bit to 0 to disable fault-interrupts.  
REG6  
REG6  
0x61  
0x61  
[1]  
[0]  
nFLTMSK  
OK  
R/W  
R
Regulator Power-OK Status. Value is 1 when output voltage  
exceeds the power-OK threshold, value is 0 otherwise.  
Innovative PowerTM  
www.active-semi.com  
- 12 -  
ActivePMUTM and ActivePathTM are trademarks of Active-Semi.  
I2CTM is a trademark of NXP.  
Copyright © 2012 Active-Semi, Inc.