ACT8342
PIN DESCRIPTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14, 16
15
Rev0, 26-May-08
NAME
nIRQ
nMSTR
nRSTO
OUT1
VP1
SW1
GP1
OUT2
INL
OUT3
ON2
ON1
REFBP
GA
ON3
DESCRIPTION
Open-Drain Push-Button Status Output. nIRQ is an open-drain output which sinks current
when nMSTR is asserted or when a fault-condition occurs. If interrupts are not masked.
Master Enable Input. Drive nMSTR to GA or to a logic low to enable the IC.
Open-Drain Reset Output. nRSTO asserts low for the reset timeout period of 300ms whenever
the IC is enabled.
Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the
internal feedback network to the output voltage.
Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as
possible to the IC.
Switching node Output for REG1. Connect this pin to the switching end of the inductor.
Power Ground for REG1. Connect GA, GP1 together at a single point as close to the IC as
possible.
Output voltage for REG2. Capable of delivering up to 80mA of output current. Output has high
impedance when disabled.
Power input for REG2, REG3. Bypass to GA with a high quality ceramic capacitor placed as
close as possible to the IC.
Output voltage for REG3. Capable of delivering up to 150mA of output current. Output has
high impedance when disabled.
Enable Control Input for REG2. Drive ON2 to INL or to a logic high for normal operation, drive
to GA or a logic low to disable REG2.
Enable control input for REG1. Drive ON1 to the VP1 or a logic high for normal operation, drive
to GA or a logic low to disable REG1.
Reference Noise Bypass. Connect a 0.01µF ceramic capacitor from REFBP to GA. This pin is
discharged to GA in shutdown.
Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1 together at a
single point as close to the IC as possible.
Enable control input for REG3. Drive ON3 to the INL or a logic high for normal operation, drive
to GA or a logic low to disable REG3.
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TM
ActivePMU
TM
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