ACT81460
Rev 1.0, 18-Dec-2018
Note, there is a difference between stand-alone load
switches and LDO load switch modes when it comes to
detecting a current limit event. When the LDO123 are
configured as a load switch, there is no interrupt when
ILIM triggers. The switch retries to power up after 14ms.
If the current limit is still present it continues this “hiccup”
cycle until the high current condition is removed. This is
different from stand-alone LSW456. For these load
switches when ILIM triggers, they “hiccup” with 14ms
cycle, but also generate an interrupt.
LOAD SWITCHES
General Description
The ACT81460 features three, 100mA load switches.
They operate from 0.6V to the VSYS voltage. The Load
Switches allow a power rail to be switched on or off to
create a power “island” for system loads. This “island”
can be turned off to minimize power consumption when
those loads are not needed. Each Load Switch can also
be incorporated into the ICs startup sequencing with
programmable turn-on and turn-off delay times. They
can also be programed to be turned on or off in SLEEP
and DPSLP states.
Input Capacitor Selection
The load switches each require a quality, low-ESR, ce-
ramic input capacitor. 1uF capacitors are typically suit-
able, but this value can be increased without limit.
Softstart
The load switch outputs are slew rate controlled to min-
imize inrush current during turn on. The rise time is ap-
proximately 9.6mV/µs.
Output Capacitor Selection
The load switches each require a quality, low-ESR, ce-
ramic input capacitor. 1uF capacitors are typically suit-
able, but this value can be increased without limit.
Enable / Disable Control
During normal operation, the load switches may be en-
abled or disabled via the I2C interface by writing to their
ON bits. Note that disabling a load switch if it is used as
an input trigger to another regulator may or may not dis-
able the other regulator following it, depending on the
specific CMI settings. The load switches have a load
discharge function designed to quickly pull the output
voltage to ground when it is disabled. The circuit con-
nects an internal resistor (50ohm) from the output to
PGND34 when the load switch is disabled.
LDO3 Load Switch
Note that LDO3 can also be configured to operate as a
load switch. Refer to the LDO section of the datasheet
for more information on this functionality.
Current Limit
The load switches provide output current limiting. They
implement current limit by measuring the voltage drop
across their internal FETs. With an overload or short cir-
cuit condition, the excessive current causes the voltage
drop across the load switch to exceed the current limit
threshold. The current limit circuit senses this voltage
and shuts down the load switch. Following a 14ms wait
time, the load switch turns on again and goes through a
soft start. When sensing the current limit, a minimum
deglitch time is used before shutting down the load
switch. The deglitch time and retry time set the duty cy-
cle of the load switch turning on and off under an output
short circuit conditions and this is chosen to protect the
load switch from electrical over stress.
For extremely light load conditions, the load switch cur-
rent limit functionality can be disabled to reduce the IC’s
quiescent current. The I2C bit EN_34_OK_OV_ILIM
controls the functionality for LSW4 and LDO3 when in
load switch mode. The I2C bit EN_LSW_ILIM_COMPS
controls the functionality for LSW5 and LSW6.
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