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ACT5830QJCGN-T 参数 Datasheet PDF下载

ACT5830QJCGN-T图片预览
型号: ACT5830QJCGN-T
PDF下载: 下载PDF文件 查看货源
内容描述: 十二通道PMU的手机 [Twelve Channel PMU for Mobile Phones]
分类和应用: 手机
文件页数/大小: 41 页 / 707 K
品牌: ACTIVE-SEMI [ ACTIVE-SEMI, INC ]
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ACT5830  
Rev PrB, 05-Mar-08  
LOW-DROPOUT LINEAR REGULATORS  
FUNCTIONAL DESCRIPTIONS  
Capacitor Selection  
The input capacitor reduces peak currents and  
noise at the voltage source. Connect a low ESR  
bulk capacitor (>1µF suggested) to the input. Select  
this bulk capacitor to meet the input ripple require-  
ments and voltage rating, rather than capacitor size.  
General Description  
The ACT5830 features eight high performance, low-  
dropout, low-noise and low quiescent current LDOs  
with high PSRR.  
Programming Output Voltages (VSET)  
All LDOs feature independently-programmable out-  
put voltages that are set via the I2C serial interface,  
increasing the ACT5830 flexibility while reducing  
total solution size and cost.  
PCB Layout Considerations  
The ACT5830’s LDOs provide good DC, AC, and  
noise performance over a wide range of operating  
conditions, and are relatively insensitive to layout  
considerations. When designing a PCB, however,  
careful layout is necessary to prevent other circuitry  
from degrading LDO performance.  
Set the output voltage by writing to the  
LDOx/VSET[_] register. See Table 7:  
LDO1234568/VSET[4:0]  
and  
Table  
8:  
LDO7/VSET[_] Output Voltage Settings for a de-  
tailed description of voltage programming options.  
A good design places input and output capacitors  
as close to the LDO inputs and output as possible,  
and utilizes a star-ground configuration for all regu-  
lators to prevent noise-coupling through ground.  
Output traces should be routed to avoid close prox-  
imity to noisy nodes, particularly the SW nodes of  
the DC/DC.  
Enabling and Disabling LDOs  
For information regarding enabling and disabling  
the LDOs during the startup and shutdown se-  
quence section. Once the startup routine is com-  
pleted the remaining LDOs can be enabled/disabled  
via either the I2C interface or the TCXO_EN  
(LDO4), RX_EN (LDO5), TX_EN (LDO6), and  
PWR_HOLD (LDO1, LDO2, LDO3, LDO7, and  
LDO8).  
REFBP is a filtered reference noise, and internally  
has a direct connection to the linear regulator con-  
troller. Any noise injected onto REFBP will directly  
affect the outputs of the linear regulators, and there-  
fore special care should be taken to ensure that no  
noise is injected to the outputs via REFBP. As with  
the LDO output capacitors, the REFBP by pass ca-  
pacitor should be placed as close to the IC as pos-  
sible, with short, direct connections to the star-  
ground. Avoid the use of vias whenever possible.  
Noisy nodes, such as from the DC/DC, should be  
routed as far away from REFBP as possible.  
Reference Bypass Pin  
The ACT5830 contains a conference bypass pin  
which filters noise from the reference, providing a  
low-noise voltage reference to the LDOs. Bypass  
REF to G with a 0.01µF ceramic capacitor.  
Compensation and Stability  
The LDOs need an output capacitor for stability.  
This capacitor should be connected as close to the  
OUT and G pins as possible to maximize device’s  
performance. To ensure best performance for the  
device, the output capacitor should have a mini-  
mum capacitance of 1µF, and ESR value between  
10mand 500m. High quality ceramic capacitors  
such as X7R and X5R dielectric types are strongly  
recommended.  
See the Capacitor Selection sections for more infor-  
mation.  
Innovative PowerTM  
- 24 -  
www.active-semi.com  
ActivePMUTM is a trademark of Active-Semi.  
I2CTM is a trademark of Philips Electronics.  
Copyright © 2008 Active-Semi, Inc.  
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