ACT5880
Rev 2, 03-Sep-13
APPLICATION INFORMATION
The ACT5880 is a combinations of many circuit
blocks including step-down DC/DCs, a step-up
DC/DC, LDOs, an RTC, an ADC block with a front
end for both TSC and general purpose analogue
signal acquisition. Each of those blocks has its own
control and configuration register, shares the same
interface block, same house keeping block which
provides common resource to other blocks,
including operation supervising, interrupts, clock
reference and voltage references. Those blocks
make a two layers architecture in system point of
view.
be turned into enable state only when either or both
the adaptor power and the main battery are
available.
In the enable state, the ACT5880 power rails may
or may not output, dependent on how those
regulators are programmed. There are 5 events or
signals that pull the ACT5880 into the enable state,
which are the nPBIN assertion, the valid adaptor
input voltage, the HFPWR assertion, the PWRHLD
assertion and the RTC alarm wake-up event. The
ACT5880 turns into disable state only when all
those 5 events or signals are de-asserted.
System and Control Information
System Control Signals
Figure 1 shows the top level functional block
diagram of the ACT5880. The ACT5880 manages 3
different power inputs and 4 groups of functional
macro-blocks. The ACT5880 can be enabled, when
system control interface and most power regulators
are available for using, only when either the adaptor
power or the main battery is available, or both of
them are available; When there is only the backup
power available, only the always-on regulator keeps
the VALIVE output and RTC running.
There are 7 foreign signals and 2 internal signals
for the system control in the ACT5880. Table 1 lists
those signals.
Table 1:
The System Control Signals to The ACT5880
SIGNALS
PBIN
DESCRIPTIONS
Push-Button input assertion.
Hand-free power requested.
HFPWR
Figure 1:
PWRHLD Input for request to hold the power output.
The Top Level Block Diagram of The ACT5880
ON6
ON9
SDA
SCL
Dedicated on/off control for OUT6.
Dedicated on/off control for OUT9.
I2C compatible serial interface.
Internal signal, is true when the CHGIN
input voltage is valid.
(ACOK)
Internal signal, is true when the RTC alarm
happens if the RTC wake-up is set.
(ALARM)
All manipulation and configuration registers are
accessible through the "fast mode" (up to 400kHz)
I2C compatible interface with standard I2C session
frame for read/write to one of single byte addressed
registers. The ACT5880 is a slave device with
device address of [1011010] or 86. In each
read/write session, the device address is sent firstly
with the 8th bit indicating that the session is for read
(1) or for write (0), followed by a register address
byte and the bidirectional transferred data byte,
each aligns MSB first and is followed by an
acknowledge bit.
The backup battery charger, the always-on
regulator and the RTC circuit are not subject to the
enable status of the ACT5880. Whenever there is
any of adaptor power and/or main battery power are
available, the backup battery charger charges or
floating charges the backup battery or the storage
cap, the always-on regulator outputs to the RTC
staff.
Among those 9 signals, the ON6, the ON9, the SDA
and SLC of the I2C interface work only when the
ACT5880 is enabled.
Device Power States
The ACT5880 has 2 powered states, which are
enable state and disable state. The ACT5880 could
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