ACT4070
Rev 2, 16-Sep-11
ORDERING INFORMATION
PART NUMBER
ACT4070YH
TEMPERATURE RANGE
PACKAGE
SOP-8/EP
SOP-8/EP
PINS
PACKING
TUBE
-40°C to 85°C
-40°C to 85°C
8
8
ACT4070YH-T
TAPE & REEL
PIN CONFIGURATION
SOP-8/EP
PIN DESCRIPTION
PIN NUMBER
PIN NAME
PIN DESCRIPTION
Bootstrap. This pin acts as the positive rail for the high-side switch’s gate driver.
Connect a 10nF between this pin and SW.
1
2
BS
IN
Input Supply. Bypass this pin to GND with a low ESR capacitor. See Input Ca-
pacitor in Application Information section.
3
4
SW
Switch Output. Connect this pin to the switching end of the inductor.
Ground.
GND
Feedback Input. The voltage at this pin is regulated to 1.222V. Connect to the
resistor divider between output and ground to set output voltage.
5
6
FB
Compensation Pin. See Compensation Technique in Application Information sec-
tion.
COMP
Enable Input. When higher than 1.3V, this pin turns the IC on. When lower than
0.7V, this pin turns the IC off. Output voltage is discharged when the IC is off. This
pin has a small internal pull up current to a high level voltage when pin is not con-
nected.
7
8
EN
N/C
Not Connected.
Exposed Pad shown as dashed box. The exposed thermal pad should be con-
nected to board ground plane and pin 4. The ground plane should include a large
exposed copper pad under the package for thermal dissipation (see package out-
line). The leads and exposed pad should be flush with the board, without offset
from the board surface.
EP
EP
Innovative PowerTM
www.active-semi.com
- 2 -
Copyright © 2011 Active-Semi, Inc.