Active-Semi
FUNCTIONAL BLOCK DIAGRAM
DRV1
VDD
9k
BIAS
& UVLO
REGULATOR
Rev 5, 05-Jun-09
ACT30
2
DRV2
+
3.6V (ACT30A/C)
4.6V (ACT30B/D)
HICCUP
CONTROL
FREQ
1
OSC &
RAMP
CURRENT
200k
PFWM
SWITCHING
CONTROL
LOGIC
ERROR
COMP
SLEW
20k
1X
56X
56X
ILIM VC
GENERATOR
40
20k
4.75V
10µA/V
GND
GND
: FREQ terminal wire-bonded to VDD in ACT30C/D (TO-92)
: DRV2 terminal wire-bonded to DRV1 in ACT30B/D (TO-92)
FUNCTIONAL DESCRIPTION
As seen in the
Functional Block Diagram,
the main
components include switching control logic, two on-
chip medium-voltage power-MOSFETs with parallel
current sensor, driver, oscillator and ramp
generator, current limit VC generator, error
comparator, hiccup control, bias and under voltage-
lockout, and regulator circuitry.
As seen in the
Functional Block Diagram,
the
design has six internal terminals. V
VDD
is the power
supply terminal. DRV1 and DRV2 are linear driver
outputs that can drive the emitter of an external
high voltage NPN transistor or N-channel MOSFET.
This emitter-drive method takes advantage of the
high V
CBO
of the transistor, allowing a low cost
transistor such as ‘13003 (V
CBO
= 700V) or ‘13002
(V
CBO
= 600V) to be used for a wide AC input range.
The slew-rate limited driver coupled with the turn-off
characteristics of an external NPN transitor result in
lower EMI.
The driver peak current is designed to have a
negative voltage coefficient with respect to supply
voltage V
VDD
, so that lower supply voltage
automatically results in higher DRV1 peak current.
This way, the optocoupler can control V
VDD
directly
to affect driver current.
Innovative Power
TM
ActiveSwitcher
TM
Startup Sequence
Figure 1 shows a
Simplified Application Circuit
for
the ACT30. Initially, the small current through
resistor R1 charges up the capacitor C1, and the
BJT acts as a follower to bring up the DRV1
voltage. An internal regulator generates a V
VDD
voltage equal to V
DRV1
– 3.6V for ACT30A (V
DRV1
–
4.6V for ACT30B) but limits it to 5.5V max. As V
VDD
crosses 5V, the regulator sourcing function stops
and V
VDD
begins to drop due to its current
consumption. As V
VDD
voltage decreases below
4.75V, the IC starts to operate with increasing driver
current. When the output voltage reaches regulation
point, the optocoupler feedback circuit stops V
VDD
from decreasing further. The switching action also
allows the auxiliary windings to take over in
supplying the C1 capacitor. Figure 2 shows a
typical startup sequence for the ACT30.
To limit the auxiliary voltage, use a 12V zener diode
for ACT30A or a 13V zener diode for ACT30B (D1
diode in Figure 1).
Even though up to 2MΩ startup resistor (R1) can be
used due to the very low startup current, the actual
R1 value should be chosen as a compromise
between standby power and startup time delay.
-4-
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