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EP100 参数 Datasheet PDF下载

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型号: EP100
PDF下载: 下载PDF文件 查看货源
内容描述: EP100的PowerPC总线从 [EP100 PowerPC Bus Slave]
分类和应用: PC
文件页数/大小: 2 页 / 76 K
品牌: ACTEL [ Actel Corporation ]
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Eureka Technology
Product Summary
EP100 PowerPC Bus Slave
FEATURES
• Fully supports PowerPC™ 60x bus protocol including PowerPC 603, 604, 740,
750 and MPC8260.
• Provide PowerPC bus device access to memory and devices on user interface.
• Direct support for standard asynchronous SRAM and synchronous BURST
SRAM.
• Burst access support using conventional asynchronous SRAM.
• Additional back-end interface bus for on-chip and off-chip logic and register
access.
• Back-end interface supports user device with various wait states.
• Burst access support including MPC8260 extended transfer size.
• Write buffer supports write posting for the back-end bus interface.
• Handles separate address bus and data bus tenure.
• Supports PowerPC address pipeline for improve performance.
• Supports address bus retry generated by other external device.
• Qualified address data bus grant through the use of bus busy signals.
• Designed for ASIC and programmable logic device implementations in various
system environments.
• Fully static design with edge triggered flip-flops.
• Optimized for Actel SX-A, RTSX-S, AX, and APA product families.
PowerPC Host Bus
EP100
PowerPC Bus
Slave
D0-63
D7-D0
A14-A0
A14-A0
OE
WE
CS
SRAM and Burst SRAM
User
Logic
OE#
WE#
CS#
© 2003 by Eureka Technology Inc.
4962 El Camino Real,
Los Altos, CA 94022, USA
Page 1
Tel: 1 650 960 3800
Fax: 1 650 960 3805
http://www.eurekatech.com