Device Architecture
Table 2-36 describes each pin in the Analog Block. Each function within the Analog Block will be
explained in detail in the following sections.
Table 2-36 • Analog Block Pin Description
Number
of Bits
Location of
Details
Signal Name
VAREF
Direction
Function
1
1
4
1
8
8
1
1
1
Input/Output Voltage reference for ADC
ADC
ADC
ADC
GNDREF
Input
Input
Input
Input
Input
Input
Input
Input
External ground reference
ADC operating mode
External system clock
Clock divide control
MODE[3:0]
SYSCLK
TVC[7:0]
ADC
ADC
ADC
ADC
ADC
STC[7:0]
Sample time control
ADCSTART
PWRDWN
ADCRESET
Start of conversion
Comparator power-down if 1
ADC resets and disables Analog
Quad – active high
BUSY
1
1
Output
Output
Output
Output
Input
1 – Running conversion
1 – Power-up calibration
1 – Valid conversion result
Conversion result
ADC
ADC
ADC
ADC
ADC
ADC
CALIBRATE
DATAVALID
RESULT[11:0]
TMSTBINT
SAMPLE
1
12
1
Internal temp. monitor strobe
1
Output
1 – An analog signal is actively being
sampled (stays high during signal
acquisition only)
0
– No analog signal is being
sampled
VAREFSEL
1
5
Input
Input
0 = Output
reference (2.56 V) to VAREF
internal
voltage
ADC
1 = Input external voltage reference
from VAREF and GNDREF
CHNUMBER[4:0]
Analog input channel select
Input
multiplexer
ACMCLK
1
1
Input
Input
Input
Input
Output
Input
Input
ACM clock
ACM
ACM
ACM
ACM
ACM
ACM
ACMWEN
ACM write enable – active high
ACM reset – active low
ACM write data
ACMRESET
1
ACMWDATA[7:0]
ACMRDATA[7:0]
ACMADDR[7:0]
CMSTB0 to CMSTB9
8
8
ACM read data
8
ACM address
10
Current monitor strobe – 1 per quad, Analog Quad
active high
GDON0 to GDON9
TMSTB0 to TMSTB9
10
10
Input
Input
Control to power MOS – 1 per quad Analog Quad
Temperature monitor strobe – 1 per Analog Quad
quad; active high
2-82
Preliminary v1.7
ACTEL [ Actel Corporation ]
