Actel Fusion Mixed-Signal FPGAs
temperature. The post-calibration phase is enabled by bit 3 of the Mode register. EQ 2-14 describes
the post-calibration time.
tpost-cal = MODE[3] × (2 × tADCCLK
)
EQ 2-14
MODE[3]: Bit 3 of the Mode register, described in Table 2-41 on page 2-103.
The calculation for the conversion time for the ADC is summarized in EQ 2-15.
tconv = tsync_read + tsample + tdistrib + tpost-cal + tsync_write
EQ 2-15
t
conv: conversion time
sync_read: maximum time for a signal to synchronize with SYSCLK. For calculation purposes, the
t
worst case is a period of SYSCLK, tSYSCLK
.
t
t
t
t
sample: Sample time
distrib: Distribution time
post-cal: Post-calibration time
sync_write: Maximum time for a signal to synchronize with SYSCLK. For calculation purposes, the
worst case is a period of SYSCLK, tSYSCLK
.
Example
This example shows how to choose the correct settings to achieve the fastest sample time in 10-bit
mode for a system that runs at 66 MHz.
The period of SYSCLK: tSYSCLK = 1/66 MHz = 0.015 µs
Choosing TVC between 1 and 33 will meet the maximum and minimum period for the ADCCLK
requirement. A higher TVC leads to a higher ADCCLK period.
The minimum TVC is chosen so that tdistrib and tpost-cal can be run faster. The period of ADCCLK
with a TVC of 1 can be computed by EQ .
tADCCLK = 4 × (1 + TVC) × tSYSCLK = 4 × (1 + 1) × 0.015 µs = 0.12 µs
From Table 2-47 on page 2-118, minimum conversion for 10-bit mode is 1.8 µs. To compute STC, the
calculation will first compute the post-calibration time, second the distribution time, and finally the
STC setting.
Since Actel recommends post-calibration for temperature drift over time, post-calibration shall be
enabled and the post-calibration time, tpost-cal, can be computed by EQ 2-16. The post-calibration
time is 0.24 µs.
tpost-cal = 2 × tADCCLK = 0.24 µs
EQ 2-16
The distribution time, tdistrib, is equal to 1.2 µs and can be computed using EQ 2-17.
tdistrib = N × tADCCLK = 10 × 0.12 = 1.2 µs
EQ 2-17
The STC value can now be computed through EQ 2-18. The sample time is equal to 0.32 µs. By
rearranging EQ 2-12 on page 2-104 with a tsample of 0.35 µs, the STC can be computed.
tsample = tconv – tpost-cal – tdistrib – tsync_read – tsync_write
= 1.8 µs – 0.24 µs – 1.2 µs – 0.15 µs – 0.15 µs = 0.32 µs
tsample
STC = ------------------- – 2 = ------------------ – 2 = 2.85
tADCCLK 0.12 µs
0.35 µs
EQ 2-18
Preliminary v1.7
2-105
ACTEL [ Actel Corporation ]
