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AFS090-1FGG256I 参数 Datasheet PDF下载

AFS090-1FGG256I图片预览
型号: AFS090-1FGG256I
PDF下载: 下载PDF文件 查看货源
内容描述: Actel的Fusion混合信号FPGA [Actel Fusion Mixed-Signal FPGAs]
分类和应用: 现场可编程门阵列可编程逻辑时钟
文件页数/大小: 318 页 / 10484 K
品牌: ACTEL [ Actel Corporation ]
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Actel Fusion Mixed-Signal FPGAs  
Direct Digital Input  
The AV, AC, and AT pads can also be configured as high-voltage digital inputs (Figure 2-69). As  
these pads are 12 V–tolerant, the digital input can also be up to 12 V. However, the frequency at  
which these pads can operate is limited to 10 MHz.  
To enable one of these analog input pads to operate as a digital input, its corresponding Digital  
Input Enable (DENAxy) pin on the Analog Block must be pulled HIGH, where x is either V, C, or T  
(for AV, AC, or AT pads, respectively) and y is in the range 0 to 9, corresponding to the appropriate  
Analog Quad.  
When the pad is configured as a digital input, the signal will come out of the Analog Block macro  
on the appropriate DAxOUTy pin, where x represents the pad type (V for AV pad, C for AC pad, or  
T for AT pad) and y represents the appropriate Analog Quad number. Example: If the AT pad in  
Analog Quad 5 is configured as a digital input, it will come out on the DATOUT5 pin of the Analog  
Block macro.  
Off-Chip  
AV  
AC  
AG  
AT  
Voltage  
Monitor Block  
Current  
Monitor Block  
Gate  
Driver  
Temperature  
Monitor Block  
Pads  
On-Chip  
Analog Quad  
Prescaler  
Prescaler  
Prescaler  
Power  
MOSFET  
Gate Driver  
Digital  
Input  
Digital  
Input  
Digital  
Input  
Current  
Monitor / Instr  
Amplifier  
Temperature  
Monitor  
To FPGA  
(DAVOUTx)  
To FPGA  
(DACOUTx)  
From FPGA  
(GDONx)  
To FPGA  
(DATOUTx)  
To Analog MUX  
To Analog MUX  
To Analog MUX  
Figure 2-69 • Analog Quad Direct Digital Input Configuration  
Preliminary v1.7  
2-89  
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