Table 1-2 •
I/O Features
Function
Input Buffer Threshold Selections
Flexible Output Driver
Output Buffer
Description
•
•
•
•
•
•
3.3V PCI, LVTTL
2.5V LVCMOS2
3.3V PCI, LVTTL
2.5V LVCMOS2
I/O on an unpowered device does not sink current
Can be used for “cold-sparing”
"Hot-Swap" Capability (except 3.3V PCI)
Selectable on an individual I/O basis
Individually selectable slew rate, high slew or low slew (The default is high slew rate).
The slew is only affected on the falling edge of an output. Rising edges of outputs are
not affected.
Power-Up
Individually selectable pull-ups and pull-downs during power-up (default is to power-up
in tristate)
Enables deterministic power-up of device
V
CCA
and V
CCI
can be powered in any order
Table 1-3 •
I/O Characteristics for All I/O Configurations
Hot Swappable
LVTTL, LVCMOS2
3.3V PCI
Yes
No
Slew Rate Control
Yes. Only affects falling edges of outputs
No. High slew rate only
Power-Up Resistor
Pull-up or pull-down
Pull-up or pull-down
Table 1-4 •
Power-up Time at which I/Os Become Active
Supply Ramp Rate
Units
A54SX08A
A54SX16A
A54SX32A
A54SX72A
0.25V/µs
µs
10
10
10
10
0.025V/µs
µs
96
100
100
100
5V/ms
ms
0.34
0.36
0.46
0.41
2.5V/ms
ms
0.65
0.62
0.74
0.67
0.5V/ms
ms
2.7
2.5
2.8
2.6
0.25V/ms
ms
5.4
4.7
5.2
5.0
0.1V/ms
ms
12.9
11.0
12.1
12.1
0.025V/ms
ms
50.8
41.6
47.2
47.2
Boundary-Scan Testing (BST)
Automotive-grade SX-A devices are IEEE 1149.1
compliant and offer superior diagnostic and testing
capabilities by providing Boundary Scan Testing (BST)
and probing capabilities. The BST function is controlled
through the special JTAG pins (TMS, TDI, TCK, TDO, and
TRST). The functionality of the JTAG pins is defined by
two available modes: Dedicated and Flexible. TMS
cannot be employed as user I/O in either mode.
To select Dedicated mode, users need to reserve the JTAG
pins in Actel’s Designer software. To reserve the JTAG
pins, users can check the "Reserve JTAG" box in "Device
Selection Wizard" (Figure
To select Dedicated mode, users need to reserve the JTAG
pins in Actel's Designer software by checking the
"Reserve JTAG" box in "Device Selection Wizard"
JTAG pins comply with LVTTL/
TTL I/O specification regardless of whether they are used
as a user I/O or a JTAG I/O. Refer to the
and
for
detailed specifications.
Dedicated Mode
In Dedicated mode, all JTAG pins are reserved for BST;
designers cannot use them as regular I/Os. An internal
pull-up resistor is automatically enabled on both TMS
and TDI pins, and the TMS pin will function as defined in
the IEEE 1149.1 (JTAG) specification.
1 -8
v2.2
ACTEL [ Actel Corporation ]
